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[209.85.222.51]) by smtp.gmail.com with ESMTPSA id t7-v6sm43608vsj.1.2018.09.04.16.42.32 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 04 Sep 2018 16:42:32 -0700 (PDT) Received: by mail-ua1-f51.google.com with SMTP id i4-v6so4367250uak.0 for ; Tue, 04 Sep 2018 16:42:32 -0700 (PDT) X-Received: by 2002:ab0:7055:: with SMTP id v21-v6mr19211446ual.44.1536104552090; Tue, 04 Sep 2018 16:42:32 -0700 (PDT) MIME-Version: 1.0 Received: by 2002:a1f:5e8e:0:0:0:0:0 with HTTP; Tue, 4 Sep 2018 16:42:31 -0700 (PDT) In-Reply-To: <20180903203405.GT3456@tuxbook-pro> References: <20180903203405.GT3456@tuxbook-pro> From: Doug Anderson Date: Tue, 4 Sep 2018 16:42:31 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 10/11] arm64: dts: qcom: Add reg-names for all tsens nodes To: Bjorn Andersson Cc: Amit Kucheria , LKML , Rajendra Nayak , linux-arm-msm , Eduardo Valentin , Siddartha Mohanadoss , Andy Gross , Matthias Kaehlcke , David Brown , Rob Herring , Mark Rutland , "open list:ARM/QUALCOMM SUPPORT" , devicetree@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On Mon, Sep 3, 2018 at 1:34 PM, Bjorn Andersson wrote: > On Tue 28 Aug 06:38 PDT 2018, Amit Kucheria wrote: > >> Instead of showing up as thermal-sensor@, the nodes will show up as >> tsens0_tm, tsen1_tm, tsens1_srot, etc. in /proc/iomem making it easier to >> read. >> >> IOW, >> >> 0c222000-0c2221fe : thermal-sensor@c263000 >> 0c223000-0c2231fe : thermal-sensor@c265000 >> 0c263000-0c2631fe : thermal-sensor@c263000 >> 0c265000-0c2651fe : thermal-sensor@c265000 >> >> becomes >> >> 0c222000-0c2221fe : tsens0_srot >> 0c223000-0c2231fe : tsens1_srot >> 0c263000-0c2631fe : tsens0_tm >> 0c265000-0c2651fe : tsens1_tm >> >> Signed-off-by: Amit Kucheria >> Reviewed-by: Matthias Kaehlcke >> --- >> arch/arm/boot/dts/qcom-msm8974.dtsi | 1 + >> arch/arm64/boot/dts/qcom/msm8916.dtsi | 1 + >> arch/arm64/boot/dts/qcom/msm8996.dtsi | 2 ++ >> arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 ++ >> 4 files changed, 6 insertions(+) >> >> diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi >> index 3c4b81c29798..64c9f81ddd90 100644 >> --- a/arch/arm/boot/dts/qcom-msm8974.dtsi >> +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi >> @@ -431,6 +431,7 @@ >> compatible = "qcom,msm8974-tsens"; >> reg = <0xfc4a9000 0x1000>, /* TM */ >> <0xfc4a8000 0x1000>; /* SROT */ >> + reg-names = "tsens_tm", "tsens_srot"; > > While the iomem output seems more convenient this way, these register > names are a contract between the DT binding and the particular tsens > instance. > > As such this is a good idea, but with the names should not include the > instance information. They should be "tm", "srot". Rob Herring doesn't seem to think so. As per I said: > From what you're saying the _only_ reason you'd ever want to use > reg-names is if there is an optional register range. Is that right? Rob said: > IMO, yes. It sounds like Rob won't NAK a change that adds reg-names if there is more than one reg, but in general he's not a fan. I'd vote to keep things consistent with Rob's worldview and just drop this change. -Doug