Received: by 2002:ac0:a5a6:0:0:0:0:0 with SMTP id m35-v6csp3365183imm; Tue, 4 Sep 2018 21:54:03 -0700 (PDT) X-Google-Smtp-Source: ANB0VdZh/ZN7d/5vH70uVh1VlgBeDrv785ApV8S7Sa+/SM1kd50rnpkZH+FzombqbwXlO7ysCP29 X-Received: by 2002:a62:12c7:: with SMTP id 68-v6mr38283253pfs.216.1536123243038; Tue, 04 Sep 2018 21:54:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1536123243; cv=none; d=google.com; s=arc-20160816; b=UcdLhUzKVuRFrD/TpSN2bQNI3ier/5Mnfi29C8BP9dOC2PJXEphI4/CRYx7v6o7s6H 18zVdlShtfOEgUiKonm/x56qLBlGvvR/RiUDW4APaoZy/uff3mkkcHumaFoA/N21OVdw oUnBzsH8rsdA9fC9iYo8ImE5VNC18WLSL4XDngFzALLgbEZmVVhzxES3KIrtXjR/sD+o dXIm/6T3zF2l0HqZG/kQqCB/F3NHuP1apUGBlmS7a1BtASjTN6oZUu2igZISCsILYzi0 GFsMs5r7u1VgIIWLPUyaTG1F1547slbjcbeUX+Falh/oH1xaX38ddkbP7+OKoINIJrFz LVGQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:cc:to:subject:message-id:date:from :references:in-reply-to:mime-version:dkim-signature; bh=1cVziYfXelTgIKyWPsM/i/D1oks0SKgHyxEVB0eDUis=; b=qjYCPZz16D2KK0AhNFVl6mqVzV1QDjdckeibPIR1bjXjQ6/iXz05ZHTRIqb+5y9lTe q5ei/VYdScDC9UaJeJ11fruK1Grr8l7017PyR3VoK/Z/0/C9O/LXhRTC/CPRO0zsePXH uKBlaNaf5IHQgBzWpjTAkkQXx17LuTSMILL6eaxXy1GSshylRl1PWoG7JKH7wfOK8mvY did/oFfsjTjgsWfarLBa5MarJvZhC0lB5QfvxAVHCTYxfuUi7toqwjFRgdOhP2W07Dc8 3KZebLSe3pldFKQk03hJCw9x9dreL8f9a1xmBHq+HscslOfN0o1NT7nlpt2dD8Vh0wBw l8Ow== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@brainfault-org.20150623.gappssmtp.com header.s=20150623 header.b=b+lonpRc; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id q1-v6si899922pgs.322.2018.09.04.21.53.42; Tue, 04 Sep 2018 21:54:02 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@brainfault-org.20150623.gappssmtp.com header.s=20150623 header.b=b+lonpRc; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727526AbeIEJUv (ORCPT + 99 others); Wed, 5 Sep 2018 05:20:51 -0400 Received: from mail-wm0-f68.google.com ([74.125.82.68]:35071 "EHLO mail-wm0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727512AbeIEJUv (ORCPT ); Wed, 5 Sep 2018 05:20:51 -0400 Received: by mail-wm0-f68.google.com with SMTP id o18-v6so6279602wmc.0 for ; Tue, 04 Sep 2018 21:52:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=brainfault-org.20150623.gappssmtp.com; s=20150623; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=1cVziYfXelTgIKyWPsM/i/D1oks0SKgHyxEVB0eDUis=; b=b+lonpRcXRUaTUkODN+VMnDzj976yA4xyd+y7xj3GHLKnHK+bOrM9+LECGS9gURf8m HgbnOXwZwn+cS54oECuqe0ZP3Xo6R12hqDowzyPIdDGnwFXD1HNGZAZ29VZC7Q24Rw8f W3bBsWoCaKWp4hwof00lo3AtE5fNm3tQwu6omrmqpEMBt7dK6R4XTlpQkHgeT2KNJj1O E0Vo+Q21xmfJeDK0JG+jxBc+2BZvWf6Eao/JBDdCIwRrcue+/qfAPuXh8h2iybZcJ14e bV+Ftmb7HMNdKiynXJHlxrJ4XG3Ki6wn35PQglBsktR1ATUvnlWwm7Pzk0PQv+ktsj5C iYgg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=1cVziYfXelTgIKyWPsM/i/D1oks0SKgHyxEVB0eDUis=; b=i1N9QgopXRYv4tsNnhjLrKMwyWbA8GD50jgj9fGzaSu562RWgSeYa53FCGOfBSAAgB et4XKXJZK/dLXGiTyBGzUovWEl41MzxlGxMakvjhDboa1y+/wYczl95BNwkGgsh0BW3E Cfw9LcEJt6RbpLx7C2yPPnnx4JwqZeY51MRyd+vIw3PULTBSluD04Egf0HnU6XhNbeJc 7dYSZ8yXjssqzynF/P11BCmq3tKJUlU4JQ7yZSkAYS0xfiLleZWlD2lNa24KOJdydAlq XSAsgTBVj3e9BhgalCb5nDk3jZRY3cDFrJ4siQwQXJz2wGVbaakkXRO+mb18WNmM15G5 +HlQ== X-Gm-Message-State: APzg51AAsZ0I8/bQJlwE9HKHf/jpgK3na50JHeyyH49B9mc4p0+yF6ZV M0kq529D7eimYgdEksXtGOLkIRVwaWZQw6yoYdstoZ6zviQ= X-Received: by 2002:a1c:b707:: with SMTP id h7-v6mr4388204wmf.91.1536123148404; Tue, 04 Sep 2018 21:52:28 -0700 (PDT) MIME-Version: 1.0 Received: by 2002:adf:9dcb:0:0:0:0:0 with HTTP; Tue, 4 Sep 2018 21:52:27 -0700 (PDT) In-Reply-To: <20180904185629.GC25119@infradead.org> References: <20180904124514.6290-1-anup@brainfault.org> <20180904124514.6290-4-anup@brainfault.org> <20180904185629.GC25119@infradead.org> From: Anup Patel Date: Wed, 5 Sep 2018 10:22:27 +0530 Message-ID: Subject: Re: [RFC PATCH 3/5] RISC-V: Select useful GENERIC_IRQ kconfig options To: Christoph Hellwig Cc: Palmer Dabbelt , Albert Ou , Daniel Lezcano , Thomas Gleixner , Jason Cooper , Marc Zyngier , Atish Patra , linux-riscv@lists.infradead.org, "linux-kernel@vger.kernel.org List" Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Sep 5, 2018 at 12:26 AM, Christoph Hellwig wrote: > On Tue, Sep 04, 2018 at 06:15:12PM +0530, Anup Patel wrote: >> This patch selects following GENERIC_IRQ kconfig options: >> GENERIC_IRQ_MULTI_HANDLER > > This is already selected by arch/riscv/Kconfig. > >> GENERIC_IRQ_PROBE > > This is something only used by ISA drivers. Why would we want that > on RISC-V? Yes, thanks for pointing. GENERIC_IRQ_PROBE is not required at this time. I will drop this selection. May be will re-consider later. > >> GENERIC_IRQ_SHOW_LEVEL > > We don't really have any special level triggerd irq handling in > RISC-V. That being said this is trivial and I don't see why it > even is a Kconfig option. Please have a discussion with Thomas > and Marc on why we have this option instead of a default. Most of MMIO device interrupts are level-interrupts. In fact, all HW interrupt lines coming to PLIC will be level-interrupts. It's just that PLIC does not implement state machine to sample Level-IRQs and Edge-IRQs differently. Even the interrupt-controller virtualization in hypervisors deal with Level and Edge interrupts differently. I am sure we will see both Level and Edge triggered interrupts in RISC-V system. The MMIO device interrupts will be mostly Level triggered and PCI MSIs will be mapped as Edge triggered by MSI controller. We should definitely select GENERIC_IRQ_SHOW_LEVEL so that nature of IRQ interrupt line is evident in /proc/interrupts. > >> HANDLE_DOMAIN_IRQ > > We aren't using handle_domain_irq anywhere in RISC-V, no need to > build this. The new RISC-V local interrupt controller driver introduced by this patchset uses handle_domain_irq(). The main advantage of handle_domain_irq() is that it helps reduce few lines of code which is otherwise common across interrupt-controller drivers (mostly code related to irq_enter(), irq_exit(), and set_irq_regs()). Regards, Anup