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[209.132.180.67]) by mx.google.com with ESMTP id x12-v6si1006971pgj.175.2018.09.04.23.23.44; Tue, 04 Sep 2018 23:23:59 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727636AbeIEKur (ORCPT + 99 others); Wed, 5 Sep 2018 06:50:47 -0400 Received: from mx2.suse.de ([195.135.220.15]:32822 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726272AbeIEKur (ORCPT ); Wed, 5 Sep 2018 06:50:47 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay1.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 7AD28AF05; Wed, 5 Sep 2018 06:22:09 +0000 (UTC) Date: Wed, 5 Sep 2018 08:22:06 +0200 (CEST) From: Jiri Kosina To: Tim Chen cc: "Schaufler, Casey" , Thomas Gleixner , Ingo Molnar , Peter Zijlstra , Josh Poimboeuf , Andrea Arcangeli , "Woodhouse, David" , Oleg Nesterov , "linux-kernel@vger.kernel.org" , "x86@kernel.org" , Andi Kleen Subject: Re: [PATCH v3 1/3] ptrace: Provide ___ptrace_may_access() that can be applied on arbitrary tasks In-Reply-To: <3f24e8c8-eab8-66c2-9a8d-957e30cac809@linux.intel.com> Message-ID: References: <31436186-88da-324e-88a0-8fdca7bf60ac@linux.intel.com> <99FC4B6EFCEFD44486C35F4C281DC67321447094@ORSMSX107.amr.corp.intel.com> <3f24e8c8-eab8-66c2-9a8d-957e30cac809@linux.intel.com> User-Agent: Alpine 2.21 (LSU 202 2017-01-01) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 4 Sep 2018, Tim Chen wrote: > I think STIBP should be an opt in option as it will have significant > impact on performance. The attack from neighbor thread is pretty > difficult to pull off considering you have to know what the sibling > thread is running and its address allocation. In many scenarios the attacker can just easily taskset itself to the correct sibling. > We could also use a security module to opt in the STIBP policy. I am a bit afraid that we are offloading to sysadmins decisions that are very hard for them to make, as they require deep understanding of both the technical details of the security issue in the CPU, and the mitigation. I surely understand that Intel is doing what they could to minimize the performance effect, but achieving that by making it a rocket science to configure it properly doesn't feel right. So, after giving it a bit more thought, I still believe "I want spectre V2 protection" vs. "I do not care about spectre V2 on my system (=nospectre_v2)" are the sane options we should provide; so I'll respin v4 of my patchset, including the ptrace check in switch_mm() (statically patched out on !IBPB-capable systems), and we can then later see whether the LSM implementation, once it exists, should be used instead. Thanks, -- Jiri Kosina SUSE Labs