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[209.132.180.67]) by mx.google.com with ESMTP id gn19si1173044plb.360.2018.09.05.00.23.15; Wed, 05 Sep 2018 00:23:30 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727987AbeIELun (ORCPT + 99 others); Wed, 5 Sep 2018 07:50:43 -0400 Received: from mail.bootlin.com ([62.4.15.54]:34970 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725865AbeIELum (ORCPT ); Wed, 5 Sep 2018 07:50:42 -0400 Received: by mail.bootlin.com (Postfix, from userid 110) id 2498D20789; Wed, 5 Sep 2018 09:21:52 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.bootlin.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (AAubervilliers-681-1-92-107.w90-88.abo.wanadoo.fr [90.88.33.107]) by mail.bootlin.com (Postfix) with ESMTPSA id E4B1A206F6; Wed, 5 Sep 2018 09:21:51 +0200 (CEST) Date: Wed, 5 Sep 2018 09:21:51 +0200 From: Maxime Ripard To: Icenowy Zheng Cc: Chen-Yu Tsai , Jagan Teki , Jernej Skrabec , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-sunxi@googlegroups.com Subject: Re: [PATCH v4 07/11] dt-bindings: clock: sun50i-a64-ccu: Add PLL_VIDEO0 macro Message-ID: <20180905072151.3jqfpzuawyohov3f@flea> References: <20180904044053.15425-1-icenowy@aosc.io> <20180904044053.15425-8-icenowy@aosc.io> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="t3gzuf2gmgk6626l" Content-Disposition: inline In-Reply-To: <20180904044053.15425-8-icenowy@aosc.io> User-Agent: NeoMutt/20180716 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --t3gzuf2gmgk6626l Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Tue, Sep 04, 2018 at 12:40:49PM +0800, Icenowy Zheng wrote: > From: Jagan Teki >=20 > Allwinner A64 HDMI PHY clock has PLL_VIDEO0 as a parent. >=20 > Include the macro on dt-bindings so-that the same can be used > while defining CCU clock phandles. >=20 > Signed-off-by: Jagan Teki > Reviewed-by: Rob Herring > Signed-off-by: Icenowy Zheng Applied, thanks! Maxime --=20 Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com --t3gzuf2gmgk6626l Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE0VqZU19dR2zEVaqr0rTAlCFNr3QFAluPhA4ACgkQ0rTAlCFN r3QDQxAAj7mPvzsiH5fbSmjgQ+8ntWeBcT2+HPD+cPwtc6eSLNzjFBYEGmmp1yge ek+tHfSqaNNaSMv8DDRoOX24hYCwJEyZSlLM9nJ67X6v71eWKV6eIYStA7NeWYfZ FNIp+aF++6eKkTlDa+ouyh/z3nsbcJ/yWcD9FFoISfCNCL3InlmRRh/9vTHUBabU AHprK7P0m3YICEbKjDw0Vnm6zYptLn5RcHSCFWRi0i6fk/XTzovp8+w0qzaxygK5 ivkgBM9mBI6KZhCBq3Laf/OHe/cL/bERYX52N2fcdFhQNroT/IaR8EW5+zvBm8/b Z0gzgblz62E0qHIvPwdpT/5JJksezmZQPbXvNRi5TUFri+dsVZ/VBjp1MefgiLqC Yv+rz9OuXA9rC7ql57/lznqmvSfygH+SjNdoFkRgj47gdDpX02nEMVn/MHkeW3WU K+0ZHMtiWEhc2YySEZngBfC4UyR1cl6teD6d+lVamfl98V/LlthWF8MaVlllBM1y YKdXVQ9lSJr1IzAddN10ca6oQVbnJAHUBoVMMqw/L2ep83OaJ39sXXrI4Y3CELIJ 6Jc0Xo6M1f07aO9vccecsN7gHeqLctnxesUR/QOSEaoRAUbSDYhC37TzPjAAO+nO JuV68cT2too0edp4bDMK4OqxM8lVGWDbjCGfPAc89wGYM1pTv0A= =TGu8 -----END PGP SIGNATURE----- --t3gzuf2gmgk6626l--