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Date:   Wed, 5 Sep 2018 14:31:01 +0200
From:   Andrew Lunn <andrew@lunn.ch>
To:     Moritz Fischer <moritz.fischer@ettus.com>
Cc:     Florian Fainelli <f.fainelli@gmail.com>, netdev@vger.kernel.org,
        "David S. Miller" <davem@davemloft.net>,
        Alex Williams <alex.williams@ni.com>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: [RFC/PATCH] net: nixge: Add PHYLINK support
Message-ID: <20180905123101.GA26739@lunn.ch>
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> Let me check, it seems there is a register that indicates whether the MAC can
> do either 1G or 10G. I might be able to use that for some of the above, but
> there is not really much in terms of writable registers there.

Can the MAC do 10 or 100? At the moment, you don't have anything
stopping the PHY anto-neg'ing 10Half. If the MAC does not fully
implement standard Ethernet, you need to tell the PHY driver about
this. That is what the validate call is about. phylink and phylib
knows what the PHY supports. It passes that list to the validate
call. You need to then remove all the modes the MAC does not support.

> It's like a DMA engine with a bit of MDIO on the side. Let me see if
> I can make it look less weird with that. If not I'll go with a
> comment explaining that there isn't much to do for the MLO_AN_PHY
> case and the MLO_FIXED cases?

You again need to configure the MAC to the selected speed, duplex,
etc. If the link is down, you want to disable the MAC. You need this
for both MLO_AN_PHY and MLO_FIXED, because both specify speeds,
duplex, etc.

	Andrew