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[85.230.190.116]) by smtp.gmail.com with ESMTPSA id h40-v6sm1183843edh.88.2018.09.05.07.41.41 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 05 Sep 2018 07:41:41 -0700 (PDT) Received: from johan by xi.terra with local (Exim 4.91) (envelope-from ) id 1fxZ0D-0004eT-58; Wed, 05 Sep 2018 16:41:53 +0200 Date: Wed, 5 Sep 2018 16:41:53 +0200 From: Johan Hovold To: "Ji-Ze Hong (Peter Hong)" Cc: johan@kernel.org, gregkh@linuxfoundation.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, peter_hong@fintek.com.tw, hpeter+linux_kernel@gmail.com Subject: Re: [PATCH V2 3/4] USB: serial: f81232: implement break control Message-ID: <20180905144153.GD1089@localhost> References: <1535593634-22004-1-git-send-email-hpeter+linux_kernel@gmail.com> <1535593634-22004-5-git-send-email-hpeter+linux_kernel@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1535593634-22004-5-git-send-email-hpeter+linux_kernel@gmail.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Aug 30, 2018 at 09:47:13AM +0800, Ji-Ze Hong (Peter Hong) wrote: > Implement Fintek F81232 break on/off with LCR register. > It's the same with 16550A LCR register layout. > > Signed-off-by: Ji-Ze Hong (Peter Hong) > --- > v2: > 1: Fix f81232_break_ctl() for mis-operated set_mask_register(). > 2: Add set break control bit in f81232_set_termios(). > > drivers/usb/serial/f81232.c | 32 ++++++++++++++++++++++++++------ > 1 file changed, 26 insertions(+), 6 deletions(-) > > diff --git a/drivers/usb/serial/f81232.c b/drivers/usb/serial/f81232.c > index 56adae8a9ee0..863430d7535f 100644 > --- a/drivers/usb/serial/f81232.c > +++ b/drivers/usb/serial/f81232.c > @@ -65,6 +65,7 @@ struct f81232_private { > struct mutex lock; > u8 modem_control; > u8 modem_status; > + bool is_break; > speed_t baud_base; > struct work_struct lsr_work; > struct work_struct interrupt_work; > @@ -377,13 +378,24 @@ static void f81232_process_read_urb(struct urb *urb) > > static void f81232_break_ctl(struct tty_struct *tty, int break_state) > { > - /* FIXME - Stubbed out for now */ > + struct usb_serial_port *port = tty->driver_data; > + struct f81232_private *priv = usb_get_serial_port_data(port); > + int status; > + u8 tmp = 0; > > - /* > - * break_state = -1 to turn on break, and 0 to turn off break > - * see drivers/char/tty_io.c to see it used. > - * last_set_data_urb_value NEVER has the break bit set in it. > - */ > + mutex_lock(&priv->lock); > + > + if (break_state) { > + priv->is_break = !!break_state; > + tmp = UART_LCR_SBC; > + } > + > + status = f81232_set_mask_register(port, LINE_CONTROL_REGISTER, > + UART_LCR_SBC, tmp); > + if (status) > + dev_err(&port->dev, "set break failed: %d\n", status); Why not maintain a shadow lsr value so that you don't have to retrieve it every time you want to change the break state? It looks like you do it this way in f81534. Johan