Received: by 2002:ac0:a5a6:0:0:0:0:0 with SMTP id m35-v6csp385724imm; Thu, 6 Sep 2018 04:10:31 -0700 (PDT) X-Google-Smtp-Source: ANB0VdbsmoZIz/XpMpS2RAVtoqWsB+VgiCM7w40eJ1T7t/qWNtUCmZTZ3cidEV5VlOWF+2DDMmXX X-Received: by 2002:a17:902:8308:: with SMTP id bd8-v6mr2120635plb.134.1536232231621; Thu, 06 Sep 2018 04:10:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1536232231; cv=none; d=google.com; s=arc-20160816; b=VNKFOA7e8n0iSVEOWpe4SAU8U0vmL7L/Zgo9JtZUvaRnF5lw267QdJ3AdkMjEIqOd1 K9cYeCmj9DbgyznMpBkamkbQih1YsRHgvZALzojnfeYpLbEYjprNeMZ7W1U3wXnyUc+6 Mzz5Avn/WeQFOKRI89fqDMCs/cy/arCaMU+LsIjZ7RrF3WCab2IU1nsMUQit88iVSAST odQsaAUBeRb+3A/chxBjgmr9PY9lyvPMlp9NPjhw6uIz1n8y15OrPmKqqD31sFJcOP+w pjMhk412yLreaM7CqN42LEC+1t5p9Y/QK42MmTiK7aIN68+1AXLFr8GglolNu5RGQTir WvPA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from; bh=Y5S6mv8MunhRGqrAhd/LVEoocoLCHRCsXDCvXNOUIgI=; b=pTGsqyTcYYkiYV1JgXJgadVvNtf0NBBRe0baETFFnliTPzbW1GEIypK5kXQGeG+sNE N5Yh9ZKzmrnYfjqcRK8Ff/Ca6f2ewyccP4crvl+oaXTWs4m3GdMSn7+RI78UDWlgdak4 Boxa39uPLQgv14RFM6G9gdm90ThN5WS8Hz7rkCQHA5hI7v5SSkCdro8v39ns1gZ3/tSh 1BDcOjIGkcjIbxVuDRgUluQZvc+jTOJObndaqREqIhISmbndkvHeT/Pqs8HLCD8u7+9o dzcI4aowdK+5bZuNOaAqFKlzGJhABsJZkNMvvds/YiIlQe+AeEyjpD9PGG2erv821jwi VNjw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id j125-v6si4845441pfc.243.2018.09.06.04.10.15; Thu, 06 Sep 2018 04:10:31 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728138AbeIFOtH (ORCPT + 99 others); Thu, 6 Sep 2018 10:49:07 -0400 Received: from mga03.intel.com ([134.134.136.65]:24700 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727793AbeIFOtH (ORCPT ); Thu, 6 Sep 2018 10:49:07 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 06 Sep 2018 03:14:22 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.53,337,1531810800"; d="scan'208";a="68817721" Received: from unknown (HELO localhost) ([10.226.45.167]) by fmsmga008.fm.intel.com with ESMTP; 06 Sep 2018 03:14:03 -0700 From: Chuanhua Lei To: yixin.zhu@linux.intel.com, chuanhua.lei@linux.intel.com Cc: "H. Peter Anvin" , Peter Zijlstra , x86@kernel.org, linux-kernel@vger.kernel.org, Thomas Gleixner , Len Brown , Pavel Tatashin , Rajvi Jingar , Ingo Molnar , Dou Liyang Subject: [PATCH] x86/tsc: Fix 32bit mode issue in get_loops_per_jiffy() Date: Thu, 6 Sep 2018 18:03:23 +0800 Message-Id: <1536228203-18701-1-git-send-email-chuanhua.lei@linux.intel.com> X-Mailer: git-send-email 2.7.5 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org lpj returns as zero which is not expected in 32 bit mode After disassembling the code, 0xc1239a9e <+199>: imul $0x3e8,0xc12296e4,%edx 0xc1239aa8 <+209>: xor %ecx,%ecx 0xc1239aaa <+211>: test %edx,%edx 0xc1239aac <+213>: mov %eax,%ebx 0xc1239aae <+215>: je 0xc1239abd 0xc1239ab0 <+217>: mov $0x64,%ecx 0xc1239ab5 <+222>: mov %edx,%eax 0xc1239ab7 <+224>: xor %edx,%edx 0xc1239ab9 <+226>: div %ecx 0xc1239abb <+228>: mov %eax,%ecx 0xc1239abd <+230>: mov %ebx,%eax 0xc1239abf <+232>: mov $0x64,%ebx 0xc1239ac4 <+237>: div %ebx 0xc1239ac6 <+239>: mov %ecx,%edx imul will load the result into %edx, %edx supposed to be high 32 bit which is not zero. It should be zero in this case. Both lpj and tsc_khz should be u64 to work properly for both 32 bit and 64 bit mode. Signed-off-by: Chuanhua Lei --- arch/x86/kernel/tsc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 1463468..b346e3f 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -1415,7 +1415,7 @@ static bool __init determine_cpu_tsc_frequencies(bool early) static unsigned long __init get_loops_per_jiffy(void) { - unsigned long lpj = tsc_khz * KHZ; + u64 lpj = ((u64)tsc_khz * KHZ); do_div(lpj, HZ); return lpj; -- 2.7.5