Received: by 2002:ac0:a5a6:0:0:0:0:0 with SMTP id m35-v6csp438752imm; Thu, 6 Sep 2018 05:04:40 -0700 (PDT) X-Google-Smtp-Source: ANB0VdbHoSMJLfosBCMw0fwpF0JO3e1oqinLr1nCceQjXjEyG56ZbKnyPZb5AoekY5ehGc5IE+cr X-Received: by 2002:a62:56d9:: with SMTP id h86-v6mr2421670pfj.229.1536235480048; Thu, 06 Sep 2018 05:04:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1536235480; cv=none; d=google.com; s=arc-20160816; b=Q5nrBsTwXQu3OhNuU05Hmz32xLmTIXKXhH7xw1qwdv8SGlzU8P6QrW1iJrnctv8/EF Di7vLS+NXEjj795Elld3DxMZetl38d/I44T0srACIgYv8BnmpBWKP+VFDF/H22fbJHIV eq4FEgDC3aFyaHLcAfYSxOayG0uE5CUh2yllgYjgggcMOmAZXTogxedK5MUXNNEamZnJ jxj40+lOOZBD4QqFiHKXKQjdJaHzSi5rWkr89tWQEWqc2bHhdPlMW9COMmHvV49jlhag WI/kJnRWhH/udEI8mF/ZIO/0zyy/gyQuRc2wvo9IF7TjzTiP39und2EjBz8e+kgQZP20 C4rA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from; bh=vBi1exFhjg4KStpg7piGK3gKQOopPonqvl3BZnS6BI8=; b=ccwhTqJMTJ+w9p8uqqZeLDNSVHFctLgD2AujiREFMOb4BFnuKNWRknQlcSlwShuWIT gjZ69xorBQCH4GOpbQeNlep2yCGtZG7rPQXJ24imKm2xNuyIsVXh7sZQ2C6+CgFvBfn5 NE+EzwjU5S12EH5KwTr1gmo5UV5vQ2I5SzYxG9SlPntuNZ/GdhIdk4WDc9/XpAjLTbex orjLm3mZ/H/gdcyyQ1NI3YfhuHSeQgljhDMRc9ol97QyAGzvefaEPokni0Z2iY8QRV/K 3AnU4UonuxHR2JSl6NnZ8/gWT9vBhQCJBGCtusqx9S0feidLYRRv2AOW6cYtGpL4c6h7 k56w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id q20-v6si4876826pll.10.2018.09.06.05.04.24; Thu, 06 Sep 2018 05:04:40 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727999AbeIFQgQ (ORCPT + 99 others); Thu, 6 Sep 2018 12:36:16 -0400 Received: from mga18.intel.com ([134.134.136.126]:62802 "EHLO mga18.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726436AbeIFQgQ (ORCPT ); Thu, 6 Sep 2018 12:36:16 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga106.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 06 Sep 2018 05:00:49 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.53,338,1531810800"; d="scan'208";a="71046709" Received: from devel-ww.sh.intel.com ([10.239.48.110]) by orsmga008.jf.intel.com with ESMTP; 06 Sep 2018 05:00:47 -0700 From: Wei Wang To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org, pbonzini@redhat.com, ak@linux.intel.com Cc: kan.liang@intel.com, peterz@infradead.org, mingo@redhat.com, rkrcmar@redhat.com, like.xu@intel.com, wei.w.wang@intel.com Subject: [PATCH v2 0/8] Guest LBR Enabling Date: Thu, 6 Sep 2018 19:30:48 +0800 Message-Id: <1536233456-12173-1-git-send-email-wei.w.wang@intel.com> X-Mailer: git-send-email 2.7.4 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Last Branch Recording (LBR) is a performance monitor unit (PMU) feature on Intel CPUs that captures branch related info. This patch series enables this feature to KVM guests. Here is a conclusion of the fundamental methods that we use: 1) the LBR feature is enabled per guest via QEMU setting of KVM_CAP_X86_GUEST_LBR; 2) when the guest has the LBR feature, the LBR stack is passed through to the guest for direct accesses; 3) When the guest uses the LBR feature with the user callstack mode, the host will help save/resotre the LBR stack when the vCPU thread is scheduled out/in. Patches 1-5 implements the above 1) and 2), and patches 6-8 implements the above 3). ChangeLog: v1->v2: - add the per guest LBR capability, KVM_CAP_X86_GUEST_LBR; - save/restore the LBR stack conditionally on the vCPU thread context switching, instead of on VMX transitions; - expose MSR_IA32_PERF_CAPABILITIES to the guest. The first version was sent out long time ago, and can be referenced here: https://lkml.org/lkml/2017/9/25/11 , and thanks for lots of the suggestions from Paolo Bonzini and Andi Kleen. Like Xu (2): KVM: PMU: support to save/restore the guest lbr stack on vCPU switching perf/x86/intel/lbr: add the guest_lbr boolean to cpuc Wei Wang (6): perf/x86: add a function to get the lbr stack KVM/x86: KVM_CAP_X86_GUEST_LBR KVM/vmx: Pass through the lbr stack to a guest KVM/x86: expose MSR_IA32_PERF_CAPABILITIES to the guest KVM/x86: enable the guest to access the debugctl msr perf/x86/intel/lbr: guest requesting KVM for lbr stack save/restore arch/x86/events/intel/lbr.c | 54 +++++++++++++++++++++++++-- arch/x86/events/perf_event.h | 1 + arch/x86/include/asm/kvm_host.h | 3 ++ arch/x86/include/asm/perf_event.h | 19 ++++++++++ arch/x86/include/uapi/asm/kvm_para.h | 2 + arch/x86/kvm/cpuid.c | 5 ++- arch/x86/kvm/pmu_intel.c | 71 +++++++++++++++++++++++++++++++++++- arch/x86/kvm/vmx.c | 60 ++++++++++++++++++++++++++++++ arch/x86/kvm/x86.c | 18 +++------ include/uapi/linux/kvm.h | 1 + 10 files changed, 215 insertions(+), 19 deletions(-) -- 2.7.4