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Subject: Re: [PATCH] x86: use WRITE_ONCE() when setting PTEs
From:   Nadav Amit <nadav.amit@gmail.com>
In-Reply-To: <20180906195731.GE4816@worktop.programming.kicks-ass.net>
Date:   Thu, 6 Sep 2018 13:12:14 -0700
Cc:     Thomas Gleixner <tglx@linutronix.de>,
        LKML <linux-kernel@vger.kernel.org>,
        Ingo Molnar <mingo@redhat.com>, X86 ML <x86@kernel.org>,
        Dave Hansen <dave.hansen@linux.intel.com>,
        Andi Kleen <ak@linux.intel.com>,
        Josh Poimboeuf <jpoimboe@redhat.com>,
        Michal Hocko <mhocko@suse.com>,
        Vlastimil Babka <vbabka@suse.cz>,
        Dave Hansen <dave.hansen@intel.com>,
        Sean Christopherson <sean.j.christopherson@intel.com>,
        Andy Lutomirski <luto@kernel.org>
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Message-Id: <10030BE1-FE29-4C60-9963-4BE932EF09BA@gmail.com>
References: <20180902181451.80520-1-namit@vmware.com>
 <20180906195731.GE4816@worktop.programming.kicks-ass.net>
To:     Peter Zijlstra <peterz@infradead.org>,
        Nadav Amit <namit@vmware.com>
Sender: linux-kernel-owner@vger.kernel.org
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at 12:57 PM, Peter Zijlstra <peterz@infradead.org> wrote:

> On Sun, Sep 02, 2018 at 11:14:50AM -0700, Nadav Amit wrote:
>> When page-table entries are set, the compiler might optimize their
>> assignment by using multiple instructions to set the PTE. This might
>> turn into a security hazard if the user somehow manages to use the
>> interim PTE. L1TF does not make our lives easier, making even an =
interim
>> non-present PTE a security hazard.
>>=20
>> Using WRITE_ONCE() to set PTEs and friends should prevent this =
potential
>> security hazard.
>>=20
>> I skimmed the differences in the binary with and without this patch. =
The
>> differences are (obviously) greater when CONFIG_PARAVIRT=3Dn as more
>> code optimizations are possible. For better and worse, the impact on =
the
>> binary with this patch is pretty small. Skimming the code did not =
cause
>> anything to jump out as a security hazard, but it seems that at least
>> move_soft_dirty_pte() caused set_pte_at() to use multiple writes.
>=20
> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
>=20
> Also, its corollary would also make sense/be required, use READ_ONCE()
> when reading these.

I don=E2=80=99t know. This would obviously be much more intrusive. I can =
add a
get_pte() and write a Coccinelle script to use it instead of reading the
PTE, but in most cases, I presume, it would be an overkill.

The reason for that is that the PTEs are supposed to be accessed while
holding the page-table lock, and the hardware can only change dirty & =
access
bits. I think that any code that assumes that these bits do not change =
while
holding the lock is already broken in more ways.