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xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Sep 2018 06:03:05.9694 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 206cd745-cc51-4979-23c5-08d614879461 X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.60.100];Helo=[xsj-pvapsmtpgw02] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN6PR02MB4943 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 6.9.2018 20:52, Wolfram Sang wrote: > On Mon, Sep 03, 2018 at 03:11:11PM +0530, shubhrajyoti.datta@gmail.com wrote: >> From: Shubhrajyoti Datta >> >> Disable interrupts while configuring the transfer and enable them back. >> >> We have below as the programming sequence >> 1. start and slave address >> 2. byte count and stop >> >> In some customer platform there was a lot of interrupts between 1 and 2 >> and after slave address (around 7 clock cyles) if 2 is not executed >> then the transaction is nacked. >> >> To fix this case make the 2 writes atomic. >> >> Signed-off-by: Shubhrajyoti Datta >> Signed-off-by: Michal Simek > > Added a newline for better readability, added the stable tag and applied > to for-current, thanks! > > BTW we have no maintainer for this driver. Would you or Michal be > interested in doing that? I don't maintain the whole driver directory > anymore. Normally we do handle it via Zynq fragment to have single point of contact. I have sent a patch for that. Please take it via i2c tree. Thanks, Michal