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[209.85.219.181]) by smtp.gmail.com with ESMTPSA id b185-v6sm2801288ywf.12.2018.09.07.01.54.33 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 07 Sep 2018 01:54:34 -0700 (PDT) Received: by mail-yb1-f181.google.com with SMTP id e18-v6so5198129ybq.5 for ; Fri, 07 Sep 2018 01:54:33 -0700 (PDT) X-Received: by 2002:a25:a568:: with SMTP id h95-v6mr3425919ybi.303.1536310473465; Fri, 07 Sep 2018 01:54:33 -0700 (PDT) MIME-Version: 1.0 References: <20180830172030.23344-1-ezequiel@collabora.com> <20180830172030.23344-4-ezequiel@collabora.com> <20180830175937.GB11521@infradead.org> In-Reply-To: <20180830175937.GB11521@infradead.org> From: Tomasz Figa Date: Fri, 7 Sep 2018 17:54:22 +0900 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [RFC 3/3] stk1160: Use non-coherent buffers for USB transfers To: Christoph Hellwig Cc: Ezequiel Garcia , Linux Media Mailing List , linux-usb@vger.kernel.org, "list@263.net:IOMMU DRIVERS , Joerg Roedel ," , Linux Kernel Mailing List , Laurent Pinchart , "Matwey V. Kornilov" , Alan Stern , kernel@collabora.com, keiichiw@chromium.org Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Aug 31, 2018 at 2:59 AM Christoph Hellwig wrote: > > > + dma_sync_single_for_cpu(&urb->dev->dev, urb->transfer_dma, > > + urb->transfer_buffer_length, DMA_FROM_DEVICE); > > You can't ue dma_sync_single_for_cpu on non-coherent dma buffers, > which is one of the major issues with them. It's not an issue of DMA API, but just an API mismatch. By design, memory allocated for device (e.g. by DMA API) doesn't have to be physically contiguous, while dma_*_single() API expects a _single_, physically contiguous region of memory. We need a way to allocate non-coherent memory using DMA API to handle (on USB example, but applies to virtually any class of devices doing DMA): - DMA address range limitations (e.g. dma_mask) - while a USB HCD driver is normally aware of those, USB device driver should have no idea, - memory mapping capability === whether contiguous memory or a set of random pages can be allocated - this is a platform integration detail, which even a USB HCD driver may not be aware of, if a SoC IOMMU is just stuffed between the bus and HCD, - platform coherency specifics - there are practical scenarios when on a coherent-by-default system it's more efficient to allocate non-coherent memory and manage caches explicitly to avoid the costs of cache snooping. If DMA_ATTR_NON_CONSISTENT is not the right way to do it, there should be definitely a new API introduced, coupled closely to DMA API implementation on given platform, since it's the only place which can solve all the constraints above. Best regards, Tomasz