Received: by 2002:ac0:a5a6:0:0:0:0:0 with SMTP id m35-v6csp540609imm; Sat, 8 Sep 2018 04:09:46 -0700 (PDT) X-Google-Smtp-Source: ANB0Vdanb2rFhJqklZQQtsY+PghjBpdQ6HMYAGNPMpt8rfi/0tmM/aIRzvIfy7dcT3A38GSzK2Ve X-Received: by 2002:a63:cb0f:: with SMTP id p15-v6mr13015416pgg.197.1536404986054; Sat, 08 Sep 2018 04:09:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1536404986; cv=none; d=google.com; s=arc-20160816; b=lL9JRxM3DS0zOk9PgPVxKe8XtZ5s5sp1stgBv0J2baxRsTMlGc4zmJYPHMnPE4VPiv wRSk75Zidc6vw2rVyRk0gUA5Bi7DgSXCxlMHrcLFo6BVflqw1kYfZgv4cmPQ6OuoW6Pn zL2T1JjSrpCVg3n84PkhFKRWoE3ESnz/2HPFyjzptK+UCppzwxOVoipfheVK8cN+b/pv h/eieqFzNsyOmeADDkoyMlrCQkv2z+eCxhVqVb2HB7bRVhqMmAqUOwEqen25XOEmb4Sy 4swfQw7stn9BTy1245xGtJssPmi5wgAp2tcvJx6MtT2HwUW/vRXD/7+iV0qa+Mhz7nB5 LeaQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=c5epXYGzgzPvoPvHtNGxvo+7wrne17hM78YH196+JwQ=; b=GzN5CAome3R0xpDz+WP5iX9sR1uX7bhBpV4XD+DdxsrW7ceeXGRPV8KGjq88G/j1xR j0te7scOcxVb+aGxcTcwrAAFP9HIcj6BnLV5zfUGMxR1/yQVRDSv69E4RmbL5v12+Wyc u9APDqwEzWb8R6b4xiMaiOb2lQ/3w2JvHCD8Ddnv8APsh9TWqZAkNfeksL9NwR1Jp0D6 Gzl600r9IzrFsDCWCdmvInbPk2frhGye3vhbLqWL7FMoy761ql81VZ0ZPW4WbtmqZLq6 bPxkevU4wUnCyv5DYGf5+qXeang055S+IJe+H1KaZZQI2JRszE6imaNMboks7hLo+CjL 6C7Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z127-v6si11046773pgb.455.2018.09.08.04.09.30; Sat, 08 Sep 2018 04:09:45 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727621AbeIHPxh (ORCPT + 99 others); Sat, 8 Sep 2018 11:53:37 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:28557 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726315AbeIHPxg (ORCPT ); Sat, 8 Sep 2018 11:53:36 -0400 X-UUID: 7c6b2133253b4695b96f75283b25c4e1-20180908 Received: from mtkcas07.mediatek.inc [(172.21.101.84)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1785144748; Sat, 08 Sep 2018 19:07:43 +0800 Received: from mtkcas09.mediatek.inc (172.21.101.178) by mtkmbs08n1.mediatek.inc (172.21.101.55) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Sat, 8 Sep 2018 19:07:42 +0800 Received: from mtkswgap22.mediatek.inc (172.21.77.33) by mtkcas09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1210.3 via Frontend Transport; Sat, 8 Sep 2018 19:07:42 +0800 From: To: , CC: , , , Zhiyong Tao , Sean Wang Subject: [PATCH v2 18/22] pinctrl: mediatek: add MT8183 pinctrl driver Date: Sat, 8 Sep 2018 19:07:34 +0800 Message-ID: <3fecbf66bd90553297ff6bc56194807ddb6b92ca.1536404280.git.sean.wang@mediatek.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Zhiyong Tao Add MT8183 pinctrl driver based on MediaTek pinctrl-paris core. Signed-off-by: Zhiyong Tao Signed-off-by: Sean Wang --- drivers/pinctrl/mediatek/Kconfig | 7 + drivers/pinctrl/mediatek/Makefile | 1 + drivers/pinctrl/mediatek/pinctrl-mt8183.c | 512 +++++++ drivers/pinctrl/mediatek/pinctrl-mtk-mt8183.h | 1916 +++++++++++++++++++++++++ 4 files changed, 2436 insertions(+) create mode 100644 drivers/pinctrl/mediatek/pinctrl-mt8183.c create mode 100644 drivers/pinctrl/mediatek/pinctrl-mtk-mt8183.h diff --git a/drivers/pinctrl/mediatek/Kconfig b/drivers/pinctrl/mediatek/Kconfig index 4a8086e..1cd5502 100644 --- a/drivers/pinctrl/mediatek/Kconfig +++ b/drivers/pinctrl/mediatek/Kconfig @@ -82,6 +82,13 @@ config PINCTRL_MT8173 default ARM64 && ARCH_MEDIATEK select PINCTRL_MTK +config PINCTRL_MT8183 + bool "Mediatek MT8183 pin control" + depends on OF + depends on ARM64 || COMPILE_TEST + default ARM64 && ARCH_MEDIATEK + select PINCTRL_MTK_PARIS + # For PMIC config PINCTRL_MT6397 bool "Mediatek MT6397 pin control" diff --git a/drivers/pinctrl/mediatek/Makefile b/drivers/pinctrl/mediatek/Makefile index 8847dce..871e0e2 100644 --- a/drivers/pinctrl/mediatek/Makefile +++ b/drivers/pinctrl/mediatek/Makefile @@ -13,4 +13,5 @@ obj-$(CONFIG_PINCTRL_MT8127) += pinctrl-mt8127.o obj-$(CONFIG_PINCTRL_MT7622) += pinctrl-mt7622.o obj-$(CONFIG_PINCTRL_MT7623) += pinctrl-mt7623.o obj-$(CONFIG_PINCTRL_MT8173) += pinctrl-mt8173.o +obj-$(CONFIG_PINCTRL_MT8183) += pinctrl-mt8183.o obj-$(CONFIG_PINCTRL_MT6397) += pinctrl-mt6397.o diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8183.c b/drivers/pinctrl/mediatek/pinctrl-mt8183.c new file mode 100644 index 0000000..bd3f00b --- /dev/null +++ b/drivers/pinctrl/mediatek/pinctrl-mt8183.c @@ -0,0 +1,512 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2018 MediaTek Inc. + * + * Author: Zhiyong Tao + * + */ + +#include "pinctrl-mtk-mt8183.h" +#include "pinctrl-paris.h" + +/* MT8183 have multiple bases to program pin configuration listed as the below: + * iocfg[0]:0x10005000, iocfg[1]:0x11F20000, iocfg[2]:0x11E80000, + * iocfg[3]:0x11E70000, iocfg[4]:0x11E90000, iocfg[5]:0x11D30000, + * iocfg[6]:0x11D20000, iocfg[7]:0x11C50000, iocfg[8]:0x11F30000. + * _i_based could be used to indicate what base the pin should be mapped into. + */ + +#define PIN_FIELD_BASE(_s_pin, _e_pin, _i_base, _s_addr, _x_addrs, _s_bit, _x_bits) \ + PIN_FIELD_CALC(_s_pin, _e_pin, _i_base, _s_addr, _x_addrs, _s_bit, \ + _x_bits, 32, 0) + +#define PINS_FIELD_BASE(_s_pin, _e_pin, _i_base, _s_addr, _x_addrs, _s_bit, _x_bits) \ + PIN_FIELD_CALC(_s_pin, _e_pin, _i_base, _s_addr, _x_addrs, _s_bit, \ + _x_bits, 32, 1) + +static const struct mtk_pin_field_calc mt8183_pin_mode_range[] = { + PIN_FIELD(0, 192, 0x300, 0x10, 0, 4), +}; + +static const struct mtk_pin_field_calc mt8183_pin_dir_range[] = { + PIN_FIELD(0, 192, 0x0, 0x10, 0, 1), +}; + +static const struct mtk_pin_field_calc mt8183_pin_di_range[] = { + PIN_FIELD(0, 192, 0x200, 0x10, 0, 1), +}; + +static const struct mtk_pin_field_calc mt8183_pin_do_range[] = { + PIN_FIELD(0, 192, 0x100, 0x10, 0, 1), +}; + +static const struct mtk_pin_field_calc mt8183_pin_ies_range[] = { + PINS_FIELD_BASE(0, 3, 6, 0x000, 0x10, 3, 1), + PINS_FIELD_BASE(4, 7, 6, 0x000, 0x10, 5, 1), + PIN_FIELD_BASE(8, 8, 6, 0x000, 0x10, 0, 1), + PINS_FIELD_BASE(9, 10, 6, 0x000, 0x10, 12, 1), + PIN_FIELD_BASE(11, 11, 1, 0x000, 0x10, 3, 1), + PIN_FIELD_BASE(12, 12, 1, 0x000, 0x10, 7, 1), + PINS_FIELD_BASE(13, 16, 2, 0x000, 0x10, 2, 1), + PINS_FIELD_BASE(17, 20, 2, 0x000, 0x10, 3, 1), + PINS_FIELD_BASE(21, 24, 2, 0x000, 0x10, 4, 1), + PINS_FIELD_BASE(25, 28, 2, 0x000, 0x10, 5, 1), + PIN_FIELD_BASE(29, 29, 2, 0x000, 0x10, 6, 1), + PIN_FIELD_BASE(30, 30, 2, 0x000, 0x10, 7, 1), + PINS_FIELD_BASE(31, 31, 2, 0x000, 0x10, 8, 1), + PINS_FIELD_BASE(32, 34, 2, 0x000, 0x10, 7, 1), + PINS_FIELD_BASE(35, 37, 3, 0x000, 0x10, 0, 1), + PINS_FIELD_BASE(38, 40, 3, 0x000, 0x10, 1, 1), + PINS_FIELD_BASE(41, 42, 3, 0x000, 0x10, 2, 1), + PINS_FIELD_BASE(43, 45, 3, 0x000, 0x10, 3, 1), + PINS_FIELD_BASE(46, 47, 3, 0x000, 0x10, 4, 1), + PINS_FIELD_BASE(48, 49, 3, 0x000, 0x10, 5, 1), + PINS_FIELD_BASE(50, 51, 4, 0x000, 0x10, 0, 1), + PINS_FIELD_BASE(52, 57, 4, 0x000, 0x10, 1, 1), + PINS_FIELD_BASE(58, 60, 4, 0x000, 0x10, 2, 1), + PINS_FIELD_BASE(61, 64, 5, 0x000, 0x10, 0, 1), + PINS_FIELD_BASE(65, 66, 5, 0x000, 0x10, 1, 1), + PINS_FIELD_BASE(67, 68, 5, 0x000, 0x10, 2, 1), + PINS_FIELD_BASE(69, 71, 5, 0x000, 0x10, 3, 1), + PINS_FIELD_BASE(72, 76, 5, 0x000, 0x10, 4, 1), + PINS_FIELD_BASE(77, 80, 5, 0x000, 0x10, 5, 1), + PIN_FIELD_BASE(81, 81, 5, 0x000, 0x10, 6, 1), + PINS_FIELD_BASE(82, 83, 5, 0x000, 0x10, 7, 1), + PIN_FIELD_BASE(84, 84, 5, 0x000, 0x10, 6, 1), + PINS_FIELD_BASE(85, 88, 5, 0x000, 0x10, 8, 1), + PIN_FIELD_BASE(89, 89, 6, 0x000, 0x10, 11, 1), + PIN_FIELD_BASE(90, 90, 6, 0x000, 0x10, 1, 1), + PINS_FIELD_BASE(91, 94, 6, 0x000, 0x10, 2, 1), + PINS_FIELD_BASE(95, 96, 6, 0x000, 0x10, 6, 1), + PINS_FIELD_BASE(97, 98, 6, 0x000, 0x10, 7, 1), + PIN_FIELD_BASE(99, 99, 6, 0x000, 0x10, 8, 1), + PIN_FIELD_BASE(100, 100, 6, 0x000, 0x10, 9, 1), + PINS_FIELD_BASE(101, 102, 6, 0x000, 0x10, 10, 1), + PINS_FIELD_BASE(103, 104, 6, 0x000, 0x10, 13, 1), + PINS_FIELD_BASE(105, 106, 6, 0x000, 0x10, 14, 1), + PIN_FIELD_BASE(107, 107, 7, 0x000, 0x10, 0, 1), + PIN_FIELD_BASE(108, 108, 7, 0x000, 0x10, 1, 1), + PIN_FIELD_BASE(109, 109, 7, 0x000, 0x10, 2, 1), + PIN_FIELD_BASE(110, 110, 7, 0x000, 0x10, 0, 1), + PIN_FIELD_BASE(111, 111, 7, 0x000, 0x10, 3, 1), + PIN_FIELD_BASE(112, 112, 7, 0x000, 0x10, 2, 1), + PIN_FIELD_BASE(113, 113, 7, 0x000, 0x10, 4, 1), + PIN_FIELD_BASE(114, 114, 7, 0x000, 0x10, 5, 1), + PIN_FIELD_BASE(115, 115, 7, 0x000, 0x10, 6, 1), + PIN_FIELD_BASE(116, 116, 7, 0x000, 0x10, 7, 1), + PIN_FIELD_BASE(117, 117, 7, 0x000, 0x10, 8, 1), + PIN_FIELD_BASE(118, 118, 7, 0x000, 0x10, 9, 1), + PIN_FIELD_BASE(119, 119, 7, 0x000, 0x10, 10, 1), + PIN_FIELD_BASE(120, 120, 7, 0x000, 0x10, 11, 1), + PIN_FIELD_BASE(121, 121, 7, 0x000, 0x10, 12, 1), + PIN_FIELD_BASE(122, 122, 8, 0x000, 0x10, 0, 1), + PIN_FIELD_BASE(123, 123, 8, 0x000, 0x10, 1, 1), + PIN_FIELD_BASE(124, 124, 8, 0x000, 0x10, 2, 1), + PINS_FIELD_BASE(125, 130, 8, 0x000, 0x10, 1, 1), + PIN_FIELD_BASE(131, 131, 8, 0x000, 0x10, 3, 1), + PIN_FIELD_BASE(132, 132, 8, 0x000, 0x10, 1, 1), + PIN_FIELD_BASE(133, 133, 8, 0x000, 0x10, 4, 1), + PIN_FIELD_BASE(134, 134, 1, 0x000, 0x10, 0, 1), + PIN_FIELD_BASE(135, 135, 1, 0x000, 0x10, 1, 1), + PINS_FIELD_BASE(136, 143, 1, 0x000, 0x10, 2, 1), + PINS_FIELD_BASE(144, 147, 1, 0x000, 0x10, 4, 1), + PIN_FIELD_BASE(148, 148, 1, 0x000, 0x10, 5, 1), + PIN_FIELD_BASE(149, 149, 1, 0x000, 0x10, 6, 1), + PINS_FIELD_BASE(150, 153, 1, 0x000, 0x10, 8, 1), + PIN_FIELD_BASE(154, 154, 1, 0x000, 0x10, 9, 1), + PINS_FIELD_BASE(155, 157, 1, 0x000, 0x10, 10, 1), + PINS_FIELD_BASE(158, 160, 1, 0x000, 0x10, 8, 1), + PINS_FIELD_BASE(161, 164, 2, 0x000, 0x10, 0, 1), + PINS_FIELD_BASE(165, 166, 2, 0x000, 0x10, 1, 1), + PINS_FIELD_BASE(167, 168, 4, 0x000, 0x10, 2, 1), + PIN_FIELD_BASE(169, 169, 4, 0x000, 0x10, 3, 1), + PINS_FIELD_BASE(170, 174, 4, 0x000, 0x10, 4, 1), + PINS_FIELD_BASE(175, 176, 4, 0x000, 0x10, 3, 1), + PINS_FIELD_BASE(177, 179, 6, 0x000, 0x10, 4, 1), +}; + +static const struct mtk_pin_field_calc mt8183_pin_smt_range[] = { + PINS_FIELD_BASE(0, 3, 6, 0x010, 0x10, 3, 1), + PINS_FIELD_BASE(4, 7, 6, 0x010, 0x10, 5, 1), + PIN_FIELD_BASE(8, 8, 6, 0x010, 0x10, 0, 1), + PINS_FIELD_BASE(9, 10, 6, 0x010, 0x10, 12, 1), + PIN_FIELD_BASE(11, 11, 1, 0x010, 0x10, 3, 1), + PIN_FIELD_BASE(12, 12, 1, 0x010, 0x10, 7, 1), + PINS_FIELD_BASE(13, 16, 2, 0x010, 0x10, 2, 1), + PINS_FIELD_BASE(17, 20, 2, 0x010, 0x10, 3, 1), + PINS_FIELD_BASE(21, 24, 2, 0x010, 0x10, 4, 1), + PINS_FIELD_BASE(25, 28, 2, 0x010, 0x10, 5, 1), + PIN_FIELD_BASE(29, 29, 2, 0x010, 0x10, 6, 1), + PIN_FIELD_BASE(30, 30, 2, 0x010, 0x10, 7, 1), + PINS_FIELD_BASE(31, 31, 2, 0x010, 0x10, 8, 1), + PINS_FIELD_BASE(32, 34, 2, 0x010, 0x10, 7, 1), + PINS_FIELD_BASE(35, 37, 3, 0x010, 0x10, 0, 1), + PINS_FIELD_BASE(38, 40, 3, 0x010, 0x10, 1, 1), + PINS_FIELD_BASE(41, 42, 3, 0x010, 0x10, 2, 1), + PINS_FIELD_BASE(43, 45, 3, 0x010, 0x10, 3, 1), + PINS_FIELD_BASE(46, 47, 3, 0x010, 0x10, 4, 1), + PINS_FIELD_BASE(48, 49, 3, 0x010, 0x10, 5, 1), + PINS_FIELD_BASE(50, 51, 4, 0x010, 0x10, 0, 1), + PINS_FIELD_BASE(52, 57, 4, 0x010, 0x10, 1, 1), + PINS_FIELD_BASE(58, 60, 4, 0x010, 0x10, 2, 1), + PINS_FIELD_BASE(61, 64, 5, 0x010, 0x10, 0, 1), + PINS_FIELD_BASE(65, 66, 5, 0x010, 0x10, 1, 1), + PINS_FIELD_BASE(67, 68, 5, 0x010, 0x10, 2, 1), + PINS_FIELD_BASE(69, 71, 5, 0x010, 0x10, 3, 1), + PINS_FIELD_BASE(72, 76, 5, 0x010, 0x10, 4, 1), + PINS_FIELD_BASE(77, 80, 5, 0x010, 0x10, 5, 1), + PIN_FIELD_BASE(81, 81, 5, 0x010, 0x10, 6, 1), + PINS_FIELD_BASE(82, 83, 5, 0x010, 0x10, 7, 1), + PIN_FIELD_BASE(84, 84, 5, 0x010, 0x10, 6, 1), + PINS_FIELD_BASE(85, 88, 5, 0x010, 0x10, 8, 1), + PIN_FIELD_BASE(89, 89, 6, 0x010, 0x10, 11, 1), + PIN_FIELD_BASE(90, 90, 6, 0x010, 0x10, 1, 1), + PINS_FIELD_BASE(91, 94, 6, 0x010, 0x10, 2, 1), + PINS_FIELD_BASE(95, 96, 6, 0x010, 0x10, 6, 1), + PINS_FIELD_BASE(97, 98, 6, 0x010, 0x10, 7, 1), + PIN_FIELD_BASE(99, 99, 6, 0x010, 0x10, 8, 1), + PIN_FIELD_BASE(100, 100, 6, 0x010, 0x10, 9, 1), + PINS_FIELD_BASE(101, 102, 6, 0x010, 0x10, 10, 1), + PINS_FIELD_BASE(103, 104, 6, 0x010, 0x10, 13, 1), + PINS_FIELD_BASE(105, 106, 6, 0x010, 0x10, 14, 1), + PIN_FIELD_BASE(107, 107, 7, 0x010, 0x10, 0, 1), + PIN_FIELD_BASE(108, 108, 7, 0x010, 0x10, 1, 1), + PIN_FIELD_BASE(109, 109, 7, 0x010, 0x10, 2, 1), + PIN_FIELD_BASE(110, 110, 7, 0x010, 0x10, 0, 1), + PIN_FIELD_BASE(111, 111, 7, 0x010, 0x10, 3, 1), + PIN_FIELD_BASE(112, 112, 7, 0x010, 0x10, 2, 1), + PIN_FIELD_BASE(113, 113, 7, 0x010, 0x10, 4, 1), + PIN_FIELD_BASE(114, 114, 7, 0x010, 0x10, 5, 1), + PIN_FIELD_BASE(115, 115, 7, 0x010, 0x10, 6, 1), + PIN_FIELD_BASE(116, 116, 7, 0x010, 0x10, 7, 1), + PIN_FIELD_BASE(117, 117, 7, 0x010, 0x10, 8, 1), + PIN_FIELD_BASE(118, 118, 7, 0x010, 0x10, 9, 1), + PIN_FIELD_BASE(119, 119, 7, 0x010, 0x10, 10, 1), + PIN_FIELD_BASE(120, 120, 7, 0x010, 0x10, 11, 1), + PIN_FIELD_BASE(121, 121, 7, 0x010, 0x10, 12, 1), + PIN_FIELD_BASE(122, 122, 8, 0x010, 0x10, 0, 1), + PIN_FIELD_BASE(123, 123, 8, 0x010, 0x10, 1, 1), + PIN_FIELD_BASE(124, 124, 8, 0x010, 0x10, 2, 1), + PINS_FIELD_BASE(125, 130, 8, 0x010, 0x10, 1, 1), + PIN_FIELD_BASE(131, 131, 8, 0x010, 0x10, 3, 1), + PIN_FIELD_BASE(132, 132, 8, 0x010, 0x10, 1, 1), + PIN_FIELD_BASE(133, 133, 8, 0x010, 0x10, 4, 1), + PIN_FIELD_BASE(134, 134, 1, 0x010, 0x10, 0, 1), + PIN_FIELD_BASE(135, 135, 1, 0x010, 0x10, 1, 1), + PINS_FIELD_BASE(136, 143, 1, 0x010, 0x10, 2, 1), + PINS_FIELD_BASE(144, 147, 1, 0x010, 0x10, 4, 1), + PIN_FIELD_BASE(148, 148, 1, 0x010, 0x10, 5, 1), + PIN_FIELD_BASE(149, 149, 1, 0x010, 0x10, 6, 1), + PINS_FIELD_BASE(150, 153, 1, 0x010, 0x10, 8, 1), + PIN_FIELD_BASE(154, 154, 1, 0x010, 0x10, 9, 1), + PINS_FIELD_BASE(155, 157, 1, 0x010, 0x10, 10, 1), + PINS_FIELD_BASE(158, 160, 1, 0x010, 0x10, 8, 1), + PINS_FIELD_BASE(161, 164, 2, 0x010, 0x10, 0, 1), + PINS_FIELD_BASE(165, 166, 2, 0x010, 0x10, 1, 1), + PINS_FIELD_BASE(167, 168, 4, 0x010, 0x10, 2, 1), + PIN_FIELD_BASE(169, 169, 4, 0x010, 0x10, 3, 1), + PINS_FIELD_BASE(170, 174, 4, 0x010, 0x10, 4, 1), + PINS_FIELD_BASE(175, 176, 4, 0x010, 0x10, 3, 1), + PINS_FIELD_BASE(177, 179, 6, 0x010, 0x10, 4, 1), +}; + +static const struct mtk_pin_field_calc mt8183_pin_pullen_range[] = { + PIN_FIELD_BASE(0, 3, 6, 0x060, 0x10, 6, 1), + PIN_FIELD_BASE(4, 7, 6, 0x060, 0x10, 11, 1), + PIN_FIELD_BASE(8, 8, 6, 0x060, 0x10, 0, 1), + PIN_FIELD_BASE(9, 10, 6, 0x060, 0x10, 26, 1), + PIN_FIELD_BASE(11, 11, 1, 0x060, 0x10, 10, 1), + PIN_FIELD_BASE(12, 12, 1, 0x060, 0x10, 17, 1), + PIN_FIELD_BASE(13, 28, 2, 0x060, 0x10, 6, 1), + PIN_FIELD_BASE(43, 49, 3, 0x060, 0x10, 8, 1), + PIN_FIELD_BASE(50, 60, 4, 0x060, 0x10, 0, 1), + PIN_FIELD_BASE(61, 88, 5, 0x060, 0x10, 0, 1), + PIN_FIELD_BASE(89, 89, 6, 0x060, 0x10, 24, 1), + PIN_FIELD_BASE(90, 90, 6, 0x060, 0x10, 1, 1), + PIN_FIELD_BASE(95, 95, 6, 0x060, 0x10, 15, 1), + PIN_FIELD_BASE(96, 102, 6, 0x060, 0x10, 17, 1), + PIN_FIELD_BASE(103, 106, 6, 0x060, 0x10, 28, 1), + PIN_FIELD_BASE(107, 121, 7, 0x060, 0x10, 0, 1), + PIN_FIELD_BASE(134, 143, 1, 0x060, 0x10, 0, 1), + PIN_FIELD_BASE(144, 149, 1, 0x060, 0x10, 11, 1), + PIN_FIELD_BASE(150, 160, 1, 0x060, 0x10, 18, 1), + PIN_FIELD_BASE(161, 166, 2, 0x060, 0x10, 0, 1), + PIN_FIELD_BASE(167, 176, 4, 0x060, 0x10, 11, 1), + PIN_FIELD_BASE(177, 177, 6, 0x060, 0x10, 10, 1), + PIN_FIELD_BASE(178, 178, 6, 0x060, 0x10, 16, 1), + PIN_FIELD_BASE(179, 179, 6, 0x060, 0x10, 25, 1), +}; + +static const struct mtk_pin_field_calc mt8183_pin_pullsel_range[] = { + PIN_FIELD_BASE(0, 3, 6, 0x080, 0x10, 6, 1), + PIN_FIELD_BASE(4, 7, 6, 0x080, 0x10, 11, 1), + PIN_FIELD_BASE(8, 8, 6, 0x080, 0x10, 0, 1), + PIN_FIELD_BASE(9, 10, 6, 0x080, 0x10, 26, 1), + PIN_FIELD_BASE(11, 11, 1, 0x080, 0x10, 10, 1), + PIN_FIELD_BASE(12, 12, 1, 0x080, 0x10, 17, 1), + PIN_FIELD_BASE(13, 28, 2, 0x080, 0x10, 6, 1), + PIN_FIELD_BASE(43, 49, 3, 0x080, 0x10, 8, 1), + PIN_FIELD_BASE(50, 60, 4, 0x080, 0x10, 0, 1), + PIN_FIELD_BASE(61, 88, 5, 0x080, 0x10, 0, 1), + PIN_FIELD_BASE(89, 89, 6, 0x080, 0x10, 24, 1), + PIN_FIELD_BASE(90, 90, 6, 0x080, 0x10, 1, 1), + PIN_FIELD_BASE(95, 95, 6, 0x080, 0x10, 15, 1), + PIN_FIELD_BASE(96, 102, 6, 0x080, 0x10, 17, 1), + PIN_FIELD_BASE(103, 106, 6, 0x080, 0x10, 28, 1), + PIN_FIELD_BASE(107, 121, 7, 0x080, 0x10, 0, 1), + PIN_FIELD_BASE(134, 143, 1, 0x080, 0x10, 0, 1), + PIN_FIELD_BASE(144, 149, 1, 0x080, 0x10, 11, 1), + PIN_FIELD_BASE(150, 160, 1, 0x080, 0x10, 18, 1), + PIN_FIELD_BASE(161, 166, 2, 0x080, 0x10, 0, 1), + PIN_FIELD_BASE(167, 176, 4, 0x080, 0x10, 11, 1), + PIN_FIELD_BASE(177, 177, 6, 0x080, 0x10, 10, 1), + PIN_FIELD_BASE(178, 178, 6, 0x080, 0x10, 16, 1), + PIN_FIELD_BASE(179, 179, 6, 0x080, 0x10, 25, 1), +}; + +static const struct mtk_pin_field_calc mt8183_pin_drv_range[] = { + PINS_FIELD_BASE(0, 3, 6, 0x0A0, 0x10, 12, 3), + PINS_FIELD_BASE(4, 7, 6, 0x0A0, 0x10, 20, 3), + PIN_FIELD_BASE(8, 8, 6, 0x0A0, 0x10, 0, 3), + PINS_FIELD_BASE(9, 10, 6, 0x0B0, 0x10, 16, 3), + PIN_FIELD_BASE(11, 11, 1, 0x0A0, 0x10, 12, 3), + PIN_FIELD_BASE(12, 12, 1, 0x0A0, 0x10, 28, 3), + PINS_FIELD_BASE(13, 16, 2, 0x0A0, 0x10, 8, 3), + PINS_FIELD_BASE(17, 20, 2, 0x0A0, 0x10, 12, 3), + PINS_FIELD_BASE(21, 24, 2, 0x0A0, 0x10, 16, 3), + PINS_FIELD_BASE(25, 28, 2, 0x0A0, 0x10, 20, 3), + PIN_FIELD_BASE(29, 29, 2, 0x0A0, 0x10, 24, 3), + PIN_FIELD_BASE(30, 30, 2, 0x0A0, 0x10, 28, 3), + PINS_FIELD_BASE(31, 31, 2, 0x0B0, 0x10, 0, 3), + PINS_FIELD_BASE(32, 34, 2, 0x0A0, 0x10, 28, 3), + PINS_FIELD_BASE(35, 37, 3, 0x0A0, 0x10, 0, 3), + PINS_FIELD_BASE(38, 40, 3, 0x0A0, 0x10, 4, 3), + PINS_FIELD_BASE(41, 42, 3, 0x0A0, 0x10, 8, 3), + PINS_FIELD_BASE(43, 45, 3, 0x0A0, 0x10, 12, 3), + PINS_FIELD_BASE(46, 47, 3, 0x0A0, 0x10, 16, 3), + PINS_FIELD_BASE(48, 49, 3, 0x0A0, 0x10, 20, 3), + PINS_FIELD_BASE(50, 51, 4, 0x0A0, 0x10, 0, 3), + PINS_FIELD_BASE(52, 57, 4, 0x0A0, 0x10, 4, 3), + PINS_FIELD_BASE(58, 60, 4, 0x0A0, 0x10, 8, 3), + PINS_FIELD_BASE(61, 64, 5, 0x0A0, 0x10, 0, 3), + PINS_FIELD_BASE(65, 66, 5, 0x0A0, 0x10, 4, 3), + PINS_FIELD_BASE(67, 68, 5, 0x0A0, 0x10, 8, 3), + PINS_FIELD_BASE(69, 71, 5, 0x0A0, 0x10, 12, 3), + PINS_FIELD_BASE(72, 76, 5, 0x0A0, 0x10, 16, 3), + PINS_FIELD_BASE(77, 80, 5, 0x0A0, 0x10, 20, 3), + PIN_FIELD_BASE(81, 81, 5, 0x0A0, 0x10, 24, 3), + PINS_FIELD_BASE(82, 83, 5, 0x0A0, 0x10, 28, 3), + PIN_FIELD_BASE(84, 84, 5, 0x0A0, 0x10, 24, 3), + PINS_FIELD_BASE(85, 88, 5, 0x0B0, 0x10, 0, 3), + PIN_FIELD_BASE(89, 89, 6, 0x0B0, 0x10, 12, 3), + PIN_FIELD_BASE(90, 90, 6, 0x0A0, 0x10, 4, 3), + PINS_FIELD_BASE(91, 94, 6, 0x0A0, 0x10, 8, 3), + PINS_FIELD_BASE(95, 96, 6, 0x0A0, 0x10, 24, 3), + PINS_FIELD_BASE(97, 98, 6, 0x0A0, 0x10, 28, 3), + PIN_FIELD_BASE(99, 99, 6, 0x0B0, 0x10, 0, 3), + PIN_FIELD_BASE(100, 100, 6, 0x0B0, 0x10, 4, 3), + PINS_FIELD_BASE(101, 102, 6, 0x0B0, 0x10, 8, 3), + PINS_FIELD_BASE(103, 104, 6, 0x0B0, 0x10, 20, 3), + PINS_FIELD_BASE(105, 106, 6, 0x0B0, 0x10, 24, 3), + PIN_FIELD_BASE(107, 107, 7, 0x0A0, 0x10, 0, 3), + PIN_FIELD_BASE(108, 108, 7, 0x0A0, 0x10, 4, 3), + PIN_FIELD_BASE(109, 109, 7, 0x0A0, 0x10, 8, 3), + PIN_FIELD_BASE(110, 110, 7, 0x0A0, 0x10, 0, 3), + PIN_FIELD_BASE(111, 111, 7, 0x0A0, 0x10, 4, 3), + PIN_FIELD_BASE(112, 112, 7, 0x0A0, 0x10, 8, 3), + PIN_FIELD_BASE(113, 113, 7, 0x0A0, 0x10, 16, 3), + PIN_FIELD_BASE(114, 114, 7, 0x0A0, 0x10, 20, 3), + PIN_FIELD_BASE(115, 115, 7, 0x0A0, 0x10, 24, 3), + PIN_FIELD_BASE(116, 116, 7, 0x0A0, 0x10, 28, 3), + PIN_FIELD_BASE(117, 117, 7, 0x0B0, 0x10, 0, 3), + PIN_FIELD_BASE(118, 118, 7, 0x0B0, 0x10, 4, 3), + PIN_FIELD_BASE(119, 119, 7, 0x0B0, 0x10, 8, 3), + PIN_FIELD_BASE(120, 120, 7, 0x0B0, 0x10, 12, 3), + PIN_FIELD_BASE(121, 121, 7, 0x0B0, 0x10, 16, 3), + PIN_FIELD_BASE(122, 122, 8, 0x0A0, 0x10, 0, 3), + PIN_FIELD_BASE(123, 123, 8, 0x0A0, 0x10, 4, 3), + PIN_FIELD_BASE(124, 124, 8, 0x0A0, 0x10, 8, 3), + PINS_FIELD_BASE(125, 130, 8, 0x0A0, 0x10, 4, 3), + PIN_FIELD_BASE(131, 131, 8, 0x0A0, 0x10, 12, 3), + PIN_FIELD_BASE(132, 132, 8, 0x0A0, 0x10, 4, 3), + PIN_FIELD_BASE(133, 133, 8, 0x0A0, 0x10, 16, 3), + PIN_FIELD_BASE(134, 134, 1, 0x0A0, 0x10, 0, 3), + PIN_FIELD_BASE(135, 135, 1, 0x0A0, 0x10, 4, 3), + PINS_FIELD_BASE(136, 143, 1, 0x0A0, 0x10, 8, 3), + PINS_FIELD_BASE(144, 147, 1, 0x0A0, 0x10, 16, 3), + PIN_FIELD_BASE(148, 148, 1, 0x0A0, 0x10, 20, 3), + PIN_FIELD_BASE(149, 149, 1, 0x0A0, 0x10, 24, 3), + PINS_FIELD_BASE(150, 153, 1, 0x0B0, 0x10, 0, 3), + PIN_FIELD_BASE(154, 154, 1, 0x0B0, 0x10, 4, 3), + PINS_FIELD_BASE(155, 157, 1, 0x0B0, 0x10, 8, 3), + PINS_FIELD_BASE(158, 160, 1, 0x0B0, 0x10, 0, 3), + PINS_FIELD_BASE(161, 164, 2, 0x0A0, 0x10, 0, 3), + PINS_FIELD_BASE(165, 166, 2, 0x0A0, 0x10, 4, 3), + PINS_FIELD_BASE(167, 168, 4, 0x0A0, 0x10, 8, 3), + PIN_FIELD_BASE(169, 169, 4, 0x0A0, 0x10, 12, 3), + PINS_FIELD_BASE(170, 174, 4, 0x0A0, 0x10, 16, 3), + PINS_FIELD_BASE(175, 176, 4, 0x0A0, 0x10, 12, 3), + PINS_FIELD_BASE(177, 179, 6, 0x0A0, 0x10, 16, 3), +}; + +static const struct mtk_pin_field_calc mt8183_pin_pupd_range[] = { + PIN_FIELD_BASE(29, 29, 2, 0x0C0, 0x10, 2, 1), + PIN_FIELD_BASE(30, 30, 2, 0x0C0, 0x10, 6, 1), + PIN_FIELD_BASE(31, 31, 2, 0x0C0, 0x10, 10, 1), + PIN_FIELD_BASE(32, 32, 2, 0x0C0, 0x10, 14, 1), + PIN_FIELD_BASE(33, 33, 2, 0x0C0, 0x10, 18, 1), + PIN_FIELD_BASE(34, 34, 2, 0x0C0, 0x10, 22, 1), + PIN_FIELD_BASE(35, 35, 3, 0x0C0, 0x10, 2, 1), + PIN_FIELD_BASE(36, 36, 3, 0x0C0, 0x10, 6, 1), + PIN_FIELD_BASE(37, 37, 3, 0x0C0, 0x10, 10, 1), + PIN_FIELD_BASE(38, 38, 3, 0x0C0, 0x10, 14, 1), + PIN_FIELD_BASE(39, 39, 3, 0x0C0, 0x10, 18, 1), + PIN_FIELD_BASE(40, 40, 3, 0x0C0, 0x10, 22, 1), + PIN_FIELD_BASE(41, 41, 3, 0x0C0, 0x10, 26, 1), + PIN_FIELD_BASE(42, 42, 3, 0x0C0, 0x10, 30, 1), + PIN_FIELD_BASE(91, 91, 6, 0x0C0, 0x10, 2, 1), + PIN_FIELD_BASE(92, 92, 6, 0x0C0, 0x10, 6, 1), + PIN_FIELD_BASE(93, 93, 6, 0x0C0, 0x10, 10, 1), + PIN_FIELD_BASE(94, 94, 6, 0x0C0, 0x10, 14, 1), + PIN_FIELD_BASE(122, 122, 8, 0x0C0, 0x10, 2, 1), + PIN_FIELD_BASE(123, 123, 8, 0x0C0, 0x10, 6, 1), + PIN_FIELD_BASE(124, 124, 8, 0x0C0, 0x10, 10, 1), + PIN_FIELD_BASE(125, 125, 8, 0x0C0, 0x10, 14, 1), + PIN_FIELD_BASE(126, 126, 8, 0x0C0, 0x10, 18, 1), + PIN_FIELD_BASE(127, 127, 8, 0x0C0, 0x10, 22, 1), + PIN_FIELD_BASE(128, 128, 8, 0x0C0, 0x10, 26, 1), + PIN_FIELD_BASE(129, 129, 8, 0x0C0, 0x10, 30, 1), + PIN_FIELD_BASE(130, 130, 8, 0x0D0, 0x10, 2, 1), + PIN_FIELD_BASE(131, 131, 8, 0x0D0, 0x10, 6, 1), + PIN_FIELD_BASE(132, 132, 8, 0x0D0, 0x10, 10, 1), + PIN_FIELD_BASE(133, 133, 8, 0x0D0, 0x10, 14, 1), +}; + +static const struct mtk_pin_field_calc mt8183_pin_r0_range[] = { + PIN_FIELD_BASE(29, 29, 2, 0x0C0, 0x10, 0, 1), + PIN_FIELD_BASE(30, 30, 2, 0x0C0, 0x10, 4, 1), + PIN_FIELD_BASE(31, 31, 2, 0x0C0, 0x10, 8, 1), + PIN_FIELD_BASE(32, 32, 2, 0x0C0, 0x10, 12, 1), + PIN_FIELD_BASE(33, 33, 2, 0x0C0, 0x10, 16, 1), + PIN_FIELD_BASE(34, 34, 2, 0x0C0, 0x10, 20, 1), + PIN_FIELD_BASE(35, 35, 3, 0x0C0, 0x10, 0, 1), + PIN_FIELD_BASE(36, 36, 3, 0x0C0, 0x10, 4, 1), + PIN_FIELD_BASE(37, 37, 3, 0x0C0, 0x10, 8, 1), + PIN_FIELD_BASE(38, 38, 3, 0x0C0, 0x10, 12, 1), + PIN_FIELD_BASE(39, 39, 3, 0x0C0, 0x10, 16, 1), + PIN_FIELD_BASE(40, 40, 3, 0x0C0, 0x10, 20, 1), + PIN_FIELD_BASE(41, 41, 3, 0x0C0, 0x10, 24, 1), + PIN_FIELD_BASE(42, 42, 3, 0x0C0, 0x10, 28, 1), + PIN_FIELD_BASE(91, 91, 6, 0x0C0, 0x10, 0, 1), + PIN_FIELD_BASE(92, 92, 6, 0x0C0, 0x10, 4, 1), + PIN_FIELD_BASE(93, 93, 6, 0x0C0, 0x10, 8, 1), + PIN_FIELD_BASE(94, 94, 6, 0x0C0, 0x10, 12, 1), + PIN_FIELD_BASE(122, 122, 8, 0x0C0, 0x10, 0, 1), + PIN_FIELD_BASE(123, 123, 8, 0x0C0, 0x10, 4, 1), + PIN_FIELD_BASE(124, 124, 8, 0x0C0, 0x10, 8, 1), + PIN_FIELD_BASE(125, 125, 8, 0x0C0, 0x10, 12, 1), + PIN_FIELD_BASE(126, 126, 8, 0x0C0, 0x10, 16, 1), + PIN_FIELD_BASE(127, 127, 8, 0x0C0, 0x10, 20, 1), + PIN_FIELD_BASE(128, 128, 8, 0x0C0, 0x10, 24, 1), + PIN_FIELD_BASE(129, 129, 8, 0x0C0, 0x10, 28, 1), + PIN_FIELD_BASE(130, 130, 8, 0x0D0, 0x10, 0, 1), + PIN_FIELD_BASE(131, 131, 8, 0x0D0, 0x10, 4, 1), + PIN_FIELD_BASE(132, 132, 8, 0x0D0, 0x10, 8, 1), + PIN_FIELD_BASE(133, 133, 8, 0x0D0, 0x10, 12, 1), +}; + +static const struct mtk_pin_field_calc mt8183_pin_r1_range[] = { + PIN_FIELD_BASE(29, 29, 2, 0x0C0, 0x10, 1, 1), + PIN_FIELD_BASE(30, 30, 2, 0x0C0, 0x10, 5, 1), + PIN_FIELD_BASE(31, 31, 2, 0x0C0, 0x10, 9, 1), + PIN_FIELD_BASE(32, 32, 2, 0x0C0, 0x10, 13, 1), + PIN_FIELD_BASE(33, 33, 2, 0x0C0, 0x10, 17, 1), + PIN_FIELD_BASE(34, 34, 2, 0x0C0, 0x10, 21, 1), + PIN_FIELD_BASE(35, 35, 3, 0x0C0, 0x10, 1, 1), + PIN_FIELD_BASE(36, 36, 3, 0x0C0, 0x10, 5, 1), + PIN_FIELD_BASE(37, 37, 3, 0x0C0, 0x10, 9, 1), + PIN_FIELD_BASE(38, 38, 3, 0x0C0, 0x10, 13, 1), + PIN_FIELD_BASE(39, 39, 3, 0x0C0, 0x10, 17, 1), + PIN_FIELD_BASE(40, 40, 3, 0x0C0, 0x10, 21, 1), + PIN_FIELD_BASE(41, 41, 3, 0x0C0, 0x10, 25, 1), + PIN_FIELD_BASE(42, 42, 3, 0x0C0, 0x10, 29, 1), + PIN_FIELD_BASE(91, 91, 6, 0x0C0, 0x10, 1, 1), + PIN_FIELD_BASE(92, 92, 6, 0x0C0, 0x10, 5, 1), + PIN_FIELD_BASE(93, 93, 6, 0x0C0, 0x10, 9, 1), + PIN_FIELD_BASE(94, 94, 6, 0x0C0, 0x10, 13, 1), + PIN_FIELD_BASE(122, 122, 8, 0x0C0, 0x10, 1, 1), + PIN_FIELD_BASE(123, 123, 8, 0x0C0, 0x10, 5, 1), + PIN_FIELD_BASE(124, 124, 8, 0x0C0, 0x10, 9, 1), + PIN_FIELD_BASE(125, 125, 8, 0x0C0, 0x10, 13, 1), + PIN_FIELD_BASE(126, 126, 8, 0x0C0, 0x10, 17, 1), + PIN_FIELD_BASE(127, 127, 8, 0x0C0, 0x10, 21, 1), + PIN_FIELD_BASE(128, 128, 8, 0x0C0, 0x10, 25, 1), + PIN_FIELD_BASE(129, 129, 8, 0x0C0, 0x10, 29, 1), + PIN_FIELD_BASE(130, 130, 8, 0x0D0, 0x10, 1, 1), + PIN_FIELD_BASE(131, 131, 8, 0x0D0, 0x10, 5, 1), + PIN_FIELD_BASE(132, 132, 8, 0x0D0, 0x10, 9, 1), + PIN_FIELD_BASE(133, 133, 8, 0x0D0, 0x10, 13, 1), +}; + +static const struct mtk_pin_reg_calc mt8183_reg_cals[PINCTRL_PIN_REG_MAX] = { + [PINCTRL_PIN_REG_MODE] = MTK_RANGE(mt8183_pin_mode_range), + [PINCTRL_PIN_REG_DIR] = MTK_RANGE(mt8183_pin_dir_range), + [PINCTRL_PIN_REG_DI] = MTK_RANGE(mt8183_pin_di_range), + [PINCTRL_PIN_REG_DO] = MTK_RANGE(mt8183_pin_do_range), + [PINCTRL_PIN_REG_SMT] = MTK_RANGE(mt8183_pin_smt_range), + [PINCTRL_PIN_REG_IES] = MTK_RANGE(mt8183_pin_ies_range), + [PINCTRL_PIN_REG_PULLEN] = MTK_RANGE(mt8183_pin_pullen_range), + [PINCTRL_PIN_REG_PULLSEL] = MTK_RANGE(mt8183_pin_pullsel_range), + [PINCTRL_PIN_REG_DRV] = MTK_RANGE(mt8183_pin_drv_range), + [PINCTRL_PIN_REG_PUPD] = MTK_RANGE(mt8183_pin_pupd_range), + [PINCTRL_PIN_REG_R0] = MTK_RANGE(mt8183_pin_r0_range), + [PINCTRL_PIN_REG_R1] = MTK_RANGE(mt8183_pin_r1_range), +}; + +static const char * const mt8183_pinctrl_register_base_names[] = { + "iocfg0", "iocfg1", "iocfg2", "iocfg3", "iocfg4", "iocfg5", + "iocfg6", "iocfg7", "iocfg8", +}; + +static const struct mtk_pin_soc mt8183_data = { + .reg_cal = mt8183_reg_cals, + .pins = mtk_pins_mt8183, + .npins = ARRAY_SIZE(mtk_pins_mt8183), + .ngrps = ARRAY_SIZE(mtk_pins_mt8183), + .gpio_m = 0, + .ies_present = true, + .base_names = mt8183_pinctrl_register_base_names, + .nbase_names = ARRAY_SIZE(mt8183_pinctrl_register_base_names), + .bias_disable_set = mtk_pinconf_bias_disable_set_rev1, + .bias_disable_get = mtk_pinconf_bias_disable_get_rev1, + .bias_set = mtk_pinconf_bias_set_rev1, + .bias_get = mtk_pinconf_bias_get_rev1, + .drive_set = mtk_pinconf_drive_set_rev1, + .drive_get = mtk_pinconf_drive_get_rev1, + .adv_pull_get = mtk_pinconf_adv_pull_get, + .adv_pull_set = mtk_pinconf_adv_pull_set, +}; + +static const struct of_device_id mt8183_pinctrl_of_match[] = { + { .compatible = "mediatek,mt8183-pinctrl", }, + { } +}; + +static int mt8183_pinctrl_probe(struct platform_device *pdev) +{ + return mtk_paris_pinctrl_probe(pdev, &mt8183_data); +} + +static struct platform_driver mt8183_pinctrl_driver = { + .driver = { + .name = "mt8183-pinctrl", + .of_match_table = mt8183_pinctrl_of_match, + }, + .probe = mt8183_pinctrl_probe, +}; + +static int __init mt8183_pinctrl_init(void) +{ + return platform_driver_register(&mt8183_pinctrl_driver); +} +arch_initcall(mt8183_pinctrl_init); diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-mt8183.h b/drivers/pinctrl/mediatek/pinctrl-mtk-mt8183.h new file mode 100644 index 0000000..79adf5b --- /dev/null +++ b/drivers/pinctrl/mediatek/pinctrl-mtk-mt8183.h @@ -0,0 +1,1916 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2018 MediaTek Inc. + * + * Author: Zhiyong Tao + * + */ + +#ifndef __PINCTRL_MTK_MT8183_H +#define __PINCTRL_MTK_MT8183_H + +#include "pinctrl-paris.h" + +static struct mtk_pin_desc mtk_pins_mt8183[] = { + MTK_PIN( + 0, "GPIO0", + MTK_EINT_FUNCTION(0, 0), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO0"), + MTK_FUNCTION(1, "MRG_SYNC"), + MTK_FUNCTION(2, "PCM0_SYNC"), + MTK_FUNCTION(3, "TP_GPIO0_AO"), + MTK_FUNCTION(4, "SRCLKENAI0"), + MTK_FUNCTION(5, "SCP_SPI2_CS"), + MTK_FUNCTION(6, "I2S3_MCK"), + MTK_FUNCTION(7, "SPI2_CSB") + ), + MTK_PIN( + 1, "GPIO1", + MTK_EINT_FUNCTION(0, 1), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO1"), + MTK_FUNCTION(1, "MRG_CLK"), + MTK_FUNCTION(2, "PCM0_CLK"), + MTK_FUNCTION(3, "TP_GPIO1_AO"), + MTK_FUNCTION(4, "CLKM3"), + MTK_FUNCTION(5, "SCP_SPI2_MO"), + MTK_FUNCTION(6, "I2S3_BCK"), + MTK_FUNCTION(7, "SPI2_MO") + ), + MTK_PIN( + 2, "GPIO2", + MTK_EINT_FUNCTION(0, 2), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO2"), + MTK_FUNCTION(1, "MRG_DO"), + MTK_FUNCTION(2, "PCM0_DO"), + MTK_FUNCTION(3, "TP_GPIO2_AO"), + MTK_FUNCTION(4, "SCL6"), + MTK_FUNCTION(5, "SCP_SPI2_CK"), + MTK_FUNCTION(6, "I2S3_LRCK"), + MTK_FUNCTION(7, "SPI2_CLK") + ), + MTK_PIN( + 3, "GPIO3", + MTK_EINT_FUNCTION(0, 3), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO3"), + MTK_FUNCTION(1, "MRG_DI"), + MTK_FUNCTION(2, "PCM0_DI"), + MTK_FUNCTION(3, "TP_GPIO3_AO"), + MTK_FUNCTION(4, "SDA6"), + MTK_FUNCTION(5, "TDM_MCK"), + MTK_FUNCTION(6, "I2S3_DO"), + MTK_FUNCTION(7, "SCP_VREQ_VAO") + ), + MTK_PIN( + 4, "GPIO4", + MTK_EINT_FUNCTION(0, 4), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO4"), + MTK_FUNCTION(1, "PWM_B"), + MTK_FUNCTION(2, "I2S0_MCK"), + MTK_FUNCTION(3, "SSPM_UTXD_AO"), + MTK_FUNCTION(4, "MD_URXD1"), + MTK_FUNCTION(5, "TDM_BCK"), + MTK_FUNCTION(6, "TP_GPIO4_AO"), + MTK_FUNCTION(7, "DAP_MD32_SWD") + ), + MTK_PIN( + 5, "GPIO5", + MTK_EINT_FUNCTION(0, 5), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO5"), + MTK_FUNCTION(1, "PWM_C"), + MTK_FUNCTION(2, "I2S0_BCK"), + MTK_FUNCTION(3, "SSPM_URXD_AO"), + MTK_FUNCTION(4, "MD_UTXD1"), + MTK_FUNCTION(5, "TDM_LRCK"), + MTK_FUNCTION(6, "TP_GPIO5_AO"), + MTK_FUNCTION(7, "DAP_MD32_SWCK") + ), + MTK_PIN( + 6, "GPIO6", + MTK_EINT_FUNCTION(0, 6), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO6"), + MTK_FUNCTION(1, "PWM_A"), + MTK_FUNCTION(2, "I2S0_LRCK"), + MTK_FUNCTION(3, "IDDIG"), + MTK_FUNCTION(4, "MD_URXD0"), + MTK_FUNCTION(5, "TDM_DATA0"), + MTK_FUNCTION(6, "TP_GPIO6_AO"), + MTK_FUNCTION(7, "CMFLASH") + ), + MTK_PIN( + 7, "GPIO7", + MTK_EINT_FUNCTION(0, 7), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO7"), + MTK_FUNCTION(1, "SPI1_B_MI"), + MTK_FUNCTION(2, "I2S0_DI"), + MTK_FUNCTION(3, "USB_DRVVBUS"), + MTK_FUNCTION(4, "MD_UTXD0"), + MTK_FUNCTION(5, "TDM_DATA1"), + MTK_FUNCTION(6, "TP_GPIO7_AO"), + MTK_FUNCTION(7, "DVFSRC_EXT_REQ") + ), + MTK_PIN( + 8, "GPIO8", + MTK_EINT_FUNCTION(0, 8), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO8"), + MTK_FUNCTION(1, "SPI1_B_CSB"), + MTK_FUNCTION(2, "ANT_SEL3"), + MTK_FUNCTION(3, "SCL7"), + MTK_FUNCTION(4, "CONN_MCU_TRST_B"), + MTK_FUNCTION(5, "TDM_DATA2"), + MTK_FUNCTION(6, "MD_INT0"), + MTK_FUNCTION(7, "JTRSTN_SEL1") + ), + MTK_PIN( + 9, "GPIO9", + MTK_EINT_FUNCTION(0, 9), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO9"), + MTK_FUNCTION(1, "SPI1_B_MO"), + MTK_FUNCTION(2, "ANT_SEL4"), + MTK_FUNCTION(3, "CMMCLK2"), + MTK_FUNCTION(4, "CONN_MCU_DBGACK_N"), + MTK_FUNCTION(5, "SSPM_JTAG_TRSTN"), + MTK_FUNCTION(6, "IO_JTAG_TRSTN"), + MTK_FUNCTION(7, "DBG_MON_B10") + ), + MTK_PIN( + 10, "GPIO10", + MTK_EINT_FUNCTION(0, 10), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO10"), + MTK_FUNCTION(1, "SPI1_B_CLK"), + MTK_FUNCTION(2, "ANT_SEL5"), + MTK_FUNCTION(3, "CMMCLK3"), + MTK_FUNCTION(4, "CONN_MCU_DBGI_N"), + MTK_FUNCTION(5, "TDM_DATA3"), + MTK_FUNCTION(6, "EXT_FRAME_SYNC"), + MTK_FUNCTION(7, "DBG_MON_B11") + ), + MTK_PIN( + 11, "GPIO11", + MTK_EINT_FUNCTION(0, 11), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO11"), + MTK_FUNCTION(1, "TP_URXD1_AO"), + MTK_FUNCTION(2, "IDDIG"), + MTK_FUNCTION(3, "SCL6"), + MTK_FUNCTION(4, "UCTS1"), + MTK_FUNCTION(5, "UCTS0"), + MTK_FUNCTION(6, "SRCLKENAI1"), + MTK_FUNCTION(7, "I2S5_MCK") + ), + MTK_PIN( + 12, "GPIO12", + MTK_EINT_FUNCTION(0, 12), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO12"), + MTK_FUNCTION(1, "TP_UTXD1_AO"), + MTK_FUNCTION(2, "USB_DRVVBUS"), + MTK_FUNCTION(3, "SDA6"), + MTK_FUNCTION(4, "URTS1"), + MTK_FUNCTION(5, "URTS0"), + MTK_FUNCTION(6, "I2S2_DI2"), + MTK_FUNCTION(7, "I2S5_BCK") + ), + MTK_PIN( + 13, "GPIO13", + MTK_EINT_FUNCTION(0, 13), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO13"), + MTK_FUNCTION(1, "DBPI_D0"), + MTK_FUNCTION(2, "SPI5_MI"), + MTK_FUNCTION(3, "PCM0_SYNC"), + MTK_FUNCTION(4, "MD_URXD0"), + MTK_FUNCTION(5, "ANT_SEL3"), + MTK_FUNCTION(6, "I2S0_MCK"), + MTK_FUNCTION(7, "DBG_MON_B15") + ), + MTK_PIN( + 14, "GPIO14", + MTK_EINT_FUNCTION(0, 14), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO14"), + MTK_FUNCTION(1, "DBPI_D1"), + MTK_FUNCTION(2, "SPI5_CSB"), + MTK_FUNCTION(3, "PCM0_CLK"), + MTK_FUNCTION(4, "MD_UTXD0"), + MTK_FUNCTION(5, "ANT_SEL4"), + MTK_FUNCTION(6, "I2S0_BCK"), + MTK_FUNCTION(7, "DBG_MON_B16") + ), + MTK_PIN( + 15, "GPIO15", + MTK_EINT_FUNCTION(0, 15), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO15"), + MTK_FUNCTION(1, "DBPI_D2"), + MTK_FUNCTION(2, "SPI5_MO"), + MTK_FUNCTION(3, "PCM0_DO"), + MTK_FUNCTION(4, "MD_URXD1"), + MTK_FUNCTION(5, "ANT_SEL5"), + MTK_FUNCTION(6, "I2S0_LRCK"), + MTK_FUNCTION(7, "DBG_MON_B17") + ), + MTK_PIN( + 16, "GPIO16", + MTK_EINT_FUNCTION(0, 16), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO16"), + MTK_FUNCTION(1, "DBPI_D3"), + MTK_FUNCTION(2, "SPI5_CLK"), + MTK_FUNCTION(3, "PCM0_DI"), + MTK_FUNCTION(4, "MD_UTXD1"), + MTK_FUNCTION(5, "ANT_SEL6"), + MTK_FUNCTION(6, "I2S0_DI"), + MTK_FUNCTION(7, "DBG_MON_B23") + ), + MTK_PIN( + 17, "GPIO17", + MTK_EINT_FUNCTION(0, 17), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO17"), + MTK_FUNCTION(1, "DBPI_D4"), + MTK_FUNCTION(2, "SPI4_MI"), + MTK_FUNCTION(3, "CONN_MCU_TRST_B"), + MTK_FUNCTION(4, "MD_INT0"), + MTK_FUNCTION(5, "ANT_SEL7"), + MTK_FUNCTION(6, "I2S3_MCK"), + MTK_FUNCTION(7, "DBG_MON_A1") + ), + MTK_PIN( + 18, "GPIO18", + MTK_EINT_FUNCTION(0, 18), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO18"), + MTK_FUNCTION(1, "DBPI_D5"), + MTK_FUNCTION(2, "SPI4_CSB"), + MTK_FUNCTION(3, "CONN_MCU_DBGI_N"), + MTK_FUNCTION(4, "MD_INT0"), + MTK_FUNCTION(5, "SCP_VREQ_VAO"), + MTK_FUNCTION(6, "I2S3_BCK"), + MTK_FUNCTION(7, "DBG_MON_A2") + ), + MTK_PIN( + 19, "GPIO19", + MTK_EINT_FUNCTION(0, 19), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO19"), + MTK_FUNCTION(1, "DBPI_D6"), + MTK_FUNCTION(2, "SPI4_MO"), + MTK_FUNCTION(3, "CONN_MCU_TDO"), + MTK_FUNCTION(4, "MD_INT2_C2K_UIM1_HOT_PLUG"), + MTK_FUNCTION(5, "URXD1"), + MTK_FUNCTION(6, "I2S3_LRCK"), + MTK_FUNCTION(7, "DBG_MON_A3") + ), + MTK_PIN( + 20, "GPIO20", + MTK_EINT_FUNCTION(0, 20), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO20"), + MTK_FUNCTION(1, "DBPI_D7"), + MTK_FUNCTION(2, "SPI4_CLK"), + MTK_FUNCTION(3, "CONN_MCU_DBGACK_N"), + MTK_FUNCTION(4, "MD_INT1_C2K_UIM0_HOT_PLUG"), + MTK_FUNCTION(5, "UTXD1"), + MTK_FUNCTION(6, "I2S3_DO"), + MTK_FUNCTION(7, "DBG_MON_A19") + ), + MTK_PIN( + 21, "GPIO21", + MTK_EINT_FUNCTION(0, 21), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO21"), + MTK_FUNCTION(1, "DBPI_D8"), + MTK_FUNCTION(2, "SPI3_MI"), + MTK_FUNCTION(3, "CONN_MCU_TMS"), + MTK_FUNCTION(4, "DAP_MD32_SWD"), + MTK_FUNCTION(5, "CONN_MCU_AICE_TMSC"), + MTK_FUNCTION(6, "I2S2_MCK"), + MTK_FUNCTION(7, "DBG_MON_B5") + ), + MTK_PIN( + 22, "GPIO22", + MTK_EINT_FUNCTION(0, 22), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO22"), + MTK_FUNCTION(1, "DBPI_D9"), + MTK_FUNCTION(2, "SPI3_CSB"), + MTK_FUNCTION(3, "CONN_MCU_TCK"), + MTK_FUNCTION(4, "DAP_MD32_SWCK"), + MTK_FUNCTION(5, "CONN_MCU_AICE_TCKC"), + MTK_FUNCTION(6, "I2S2_BCK"), + MTK_FUNCTION(7, "DBG_MON_B6") + ), + MTK_PIN( + 23, "GPIO23", + MTK_EINT_FUNCTION(0, 23), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO23"), + MTK_FUNCTION(1, "DBPI_D10"), + MTK_FUNCTION(2, "SPI3_MO"), + MTK_FUNCTION(3, "CONN_MCU_TDI"), + MTK_FUNCTION(4, "UCTS1"), + MTK_FUNCTION(5, "EXT_FRAME_SYNC"), + MTK_FUNCTION(6, "I2S2_LRCK"), + MTK_FUNCTION(7, "DBG_MON_B7") + ), + MTK_PIN( + 24, "GPIO24", + MTK_EINT_FUNCTION(0, 24), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO24"), + MTK_FUNCTION(1, "DBPI_D11"), + MTK_FUNCTION(2, "SPI3_CLK"), + MTK_FUNCTION(3, "SRCLKENAI0"), + MTK_FUNCTION(4, "URTS1"), + MTK_FUNCTION(5, "IO_JTAG_TCK"), + MTK_FUNCTION(6, "I2S2_DI"), + MTK_FUNCTION(7, "DBG_MON_B31") + ), + MTK_PIN( + 25, "GPIO25", + MTK_EINT_FUNCTION(0, 25), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO25"), + MTK_FUNCTION(1, "DBPI_HSYNC"), + MTK_FUNCTION(2, "ANT_SEL0"), + MTK_FUNCTION(3, "SCL6"), + MTK_FUNCTION(4, "KPCOL2"), + MTK_FUNCTION(5, "IO_JTAG_TMS"), + MTK_FUNCTION(6, "I2S1_MCK"), + MTK_FUNCTION(7, "DBG_MON_B0") + ), + MTK_PIN( + 26, "GPIO26", + MTK_EINT_FUNCTION(0, 26), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO26"), + MTK_FUNCTION(1, "DBPI_VSYNC"), + MTK_FUNCTION(2, "ANT_SEL1"), + MTK_FUNCTION(3, "SDA6"), + MTK_FUNCTION(4, "KPROW2"), + MTK_FUNCTION(5, "IO_JTAG_TDI"), + MTK_FUNCTION(6, "I2S1_BCK"), + MTK_FUNCTION(7, "DBG_MON_B1") + ), + MTK_PIN( + 27, "GPIO27", + MTK_EINT_FUNCTION(0, 27), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO27"), + MTK_FUNCTION(1, "DBPI_DE"), + MTK_FUNCTION(2, "ANT_SEL2"), + MTK_FUNCTION(3, "SCL7"), + MTK_FUNCTION(4, "DMIC_CLK"), + MTK_FUNCTION(5, "IO_JTAG_TDO"), + MTK_FUNCTION(6, "I2S1_LRCK"), + MTK_FUNCTION(7, "DBG_MON_B9") + ), + MTK_PIN( + 28, "GPIO28", + MTK_EINT_FUNCTION(0, 28), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO28"), + MTK_FUNCTION(1, "DBPI_CK"), + MTK_FUNCTION(2, "DVFSRC_EXT_REQ"), + MTK_FUNCTION(3, "SDA7"), + MTK_FUNCTION(4, "DMIC_DAT"), + MTK_FUNCTION(5, "IO_JTAG_TRSTN"), + MTK_FUNCTION(6, "I2S1_DO"), + MTK_FUNCTION(7, "DBG_MON_B32") + ), + MTK_PIN( + 29, "GPIO29", + MTK_EINT_FUNCTION(0, 29), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO29"), + MTK_FUNCTION(1, "MSDC1_CLK"), + MTK_FUNCTION(2, "IO_JTAG_TCK"), + MTK_FUNCTION(3, "UDI_TCK"), + MTK_FUNCTION(4, "CONN_DSP_JCK"), + MTK_FUNCTION(5, "SSPM_JTAG_TCK"), + MTK_FUNCTION(6, "PCM1_CLK"), + MTK_FUNCTION(7, "DBG_MON_A6") + ), + MTK_PIN( + 30, "GPIO30", + MTK_EINT_FUNCTION(0, 30), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO30"), + MTK_FUNCTION(1, "MSDC1_DAT3"), + MTK_FUNCTION(2, "DAP_MD32_SWD"), + MTK_FUNCTION(3, "CONN_MCU_AICE_TMSC"), + MTK_FUNCTION(4, "CONN_DSP_JINTP"), + MTK_FUNCTION(5, "SSPM_JTAG_TRSTN"), + MTK_FUNCTION(6, "PCM1_DI"), + MTK_FUNCTION(7, "DBG_MON_A7") + ), + MTK_PIN( + 31, "GPIO31", + MTK_EINT_FUNCTION(0, 31), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO31"), + MTK_FUNCTION(1, "MSDC1_CMD"), + MTK_FUNCTION(2, "IO_JTAG_TMS"), + MTK_FUNCTION(3, "UDI_TMS"), + MTK_FUNCTION(4, "CONN_DSP_JMS"), + MTK_FUNCTION(5, "SSPM_JTAG_TMS"), + MTK_FUNCTION(6, "PCM1_SYNC"), + MTK_FUNCTION(7, "DBG_MON_A8") + ), + MTK_PIN( + 32, "GPIO32", + MTK_EINT_FUNCTION(0, 32), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO32"), + MTK_FUNCTION(1, "MSDC1_DAT0"), + MTK_FUNCTION(2, "IO_JTAG_TDI"), + MTK_FUNCTION(3, "UDI_TDI"), + MTK_FUNCTION(4, "CONN_DSP_JDI"), + MTK_FUNCTION(5, "SSPM_JTAG_TDI"), + MTK_FUNCTION(6, "PCM1_DO0"), + MTK_FUNCTION(7, "DBG_MON_A9") + ), + MTK_PIN( + 33, "GPIO33", + MTK_EINT_FUNCTION(0, 33), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO33"), + MTK_FUNCTION(1, "MSDC1_DAT2"), + MTK_FUNCTION(2, "IO_JTAG_TRSTN"), + MTK_FUNCTION(3, "UDI_NTRST"), + MTK_FUNCTION(4, "DAP_MD32_SWCK"), + MTK_FUNCTION(5, "CONN_MCU_AICE_TCKC"), + MTK_FUNCTION(6, "PCM1_DO2"), + MTK_FUNCTION(7, "DBG_MON_A10") + ), + MTK_PIN( + 34, "GPIO34", + MTK_EINT_FUNCTION(0, 34), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO34"), + MTK_FUNCTION(1, "MSDC1_DAT1"), + MTK_FUNCTION(2, "IO_JTAG_TDO"), + MTK_FUNCTION(3, "UDI_TDO"), + MTK_FUNCTION(4, "CONN_DSP_JDO"), + MTK_FUNCTION(5, "SSPM_JTAG_TDO"), + MTK_FUNCTION(6, "PCM1_DO1"), + MTK_FUNCTION(7, "DBG_MON_A11") + ), + MTK_PIN( + 35, "GPIO35", + MTK_EINT_FUNCTION(0, 35), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO35"), + MTK_FUNCTION(1, "MD1_SIM2_SIO"), + MTK_FUNCTION(2, "CCU_JTAG_TDO"), + MTK_FUNCTION(3, "MD1_SIM1_SIO"), + MTK_FUNCTION(5, "SCP_JTAG_TDO"), + MTK_FUNCTION(6, "CONN_DSP_JMS"), + MTK_FUNCTION(7, "DBG_MON_A28") + ), + MTK_PIN( + 36, "GPIO36", + MTK_EINT_FUNCTION(0, 36), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO36"), + MTK_FUNCTION(1, "MD1_SIM2_SRST"), + MTK_FUNCTION(2, "CCU_JTAG_TMS"), + MTK_FUNCTION(3, "MD1_SIM1_SRST"), + MTK_FUNCTION(4, "CONN_MCU_AICE_TMSC"), + MTK_FUNCTION(5, "SCP_JTAG_TMS"), + MTK_FUNCTION(6, "CONN_DSP_JINTP"), + MTK_FUNCTION(7, "DBG_MON_A29") + ), + MTK_PIN( + 37, "GPIO37", + MTK_EINT_FUNCTION(0, 37), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO37"), + MTK_FUNCTION(1, "MD1_SIM2_SCLK"), + MTK_FUNCTION(2, "CCU_JTAG_TDI"), + MTK_FUNCTION(3, "MD1_SIM1_SCLK"), + MTK_FUNCTION(5, "SCP_JTAG_TDI"), + MTK_FUNCTION(6, "CONN_DSP_JDO"), + MTK_FUNCTION(7, "DBG_MON_A30") + ), + MTK_PIN( + 38, "GPIO38", + MTK_EINT_FUNCTION(0, 38), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO38"), + MTK_FUNCTION(1, "MD1_SIM1_SCLK"), + MTK_FUNCTION(3, "MD1_SIM2_SCLK"), + MTK_FUNCTION(4, "CONN_MCU_AICE_TCKC"), + MTK_FUNCTION(7, "DBG_MON_A20") + ), + MTK_PIN( + 39, "GPIO39", + MTK_EINT_FUNCTION(0, 39), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO39"), + MTK_FUNCTION(1, "MD1_SIM1_SRST"), + MTK_FUNCTION(2, "CCU_JTAG_TCK"), + MTK_FUNCTION(3, "MD1_SIM2_SRST"), + MTK_FUNCTION(5, "SCP_JTAG_TCK"), + MTK_FUNCTION(6, "CONN_DSP_JCK"), + MTK_FUNCTION(7, "DBG_MON_A31") + ), + MTK_PIN( + 40, "GPIO40", + MTK_EINT_FUNCTION(0, 40), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO40"), + MTK_FUNCTION(1, "MD1_SIM1_SIO"), + MTK_FUNCTION(2, "CCU_JTAG_TRST"), + MTK_FUNCTION(3, "MD1_SIM2_SIO"), + MTK_FUNCTION(5, "SCP_JTAG_TRSTN"), + MTK_FUNCTION(6, "CONN_DSP_JDI"), + MTK_FUNCTION(7, "DBG_MON_A32") + ), + MTK_PIN( + 41, "GPIO41", + MTK_EINT_FUNCTION(0, 41), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO41"), + MTK_FUNCTION(1, "IDDIG"), + MTK_FUNCTION(2, "URXD1"), + MTK_FUNCTION(3, "UCTS0"), + MTK_FUNCTION(4, "SSPM_UTXD_AO"), + MTK_FUNCTION(5, "EXT_FRAME_SYNC"), + MTK_FUNCTION(6, "DMIC_CLK") + ), + MTK_PIN( + 42, "GPIO42", + MTK_EINT_FUNCTION(0, 42), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO42"), + MTK_FUNCTION(1, "USB_DRVVBUS"), + MTK_FUNCTION(2, "UTXD1"), + MTK_FUNCTION(3, "URTS0"), + MTK_FUNCTION(4, "SSPM_URXD_AO"), + MTK_FUNCTION(5, "EXT_FRAME_SYNC"), + MTK_FUNCTION(6, "DMIC_DAT") + ), + MTK_PIN( + 43, "GPIO43", + MTK_EINT_FUNCTION(0, 43), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO43"), + MTK_FUNCTION(1, "DISP_PWM") + ), + MTK_PIN( + 44, "GPIO44", + MTK_EINT_FUNCTION(0, 44), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO44"), + MTK_FUNCTION(1, "DSI_TE") + ), + MTK_PIN( + 45, "GPIO45", + MTK_EINT_FUNCTION(0, 45), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO45"), + MTK_FUNCTION(1, "LCM_RST") + ), + MTK_PIN( + 46, "GPIO46", + MTK_EINT_FUNCTION(0, 46), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO46"), + MTK_FUNCTION(1, "MD_INT2_C2K_UIM1_HOT_PLUG"), + MTK_FUNCTION(2, "URXD1"), + MTK_FUNCTION(3, "UCTS1"), + MTK_FUNCTION(4, "CCU_UTXD_AO"), + MTK_FUNCTION(5, "TP_UCTS1_AO"), + MTK_FUNCTION(6, "IDDIG"), + MTK_FUNCTION(7, "I2S5_LRCK") + ), + MTK_PIN( + 47, "GPIO47", + MTK_EINT_FUNCTION(0, 47), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO47"), + MTK_FUNCTION(1, "MD_INT1_C2K_UIM0_HOT_PLUG"), + MTK_FUNCTION(2, "UTXD1"), + MTK_FUNCTION(3, "URTS1"), + MTK_FUNCTION(4, "CCU_URXD_AO"), + MTK_FUNCTION(5, "TP_URTS1_AO"), + MTK_FUNCTION(6, "USB_DRVVBUS"), + MTK_FUNCTION(7, "I2S5_DO") + ), + MTK_PIN( + 48, "GPIO48", + MTK_EINT_FUNCTION(0, 48), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO48"), + MTK_FUNCTION(1, "SCL5") + ), + MTK_PIN( + 49, "GPIO49", + MTK_EINT_FUNCTION(0, 49), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO49"), + MTK_FUNCTION(1, "SDA5") + ), + MTK_PIN( + 50, "GPIO50", + MTK_EINT_FUNCTION(0, 50), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO50"), + MTK_FUNCTION(1, "SCL3") + ), + MTK_PIN( + 51, "GPIO51", + MTK_EINT_FUNCTION(0, 51), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO51"), + MTK_FUNCTION(1, "SDA3") + ), + MTK_PIN( + 52, "GPIO52", + MTK_EINT_FUNCTION(0, 52), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO52"), + MTK_FUNCTION(1, "BPI_ANT2") + ), + MTK_PIN( + 53, "GPIO53", + MTK_EINT_FUNCTION(0, 53), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO53"), + MTK_FUNCTION(1, "BPI_ANT0") + ), + MTK_PIN( + 54, "GPIO54", + MTK_EINT_FUNCTION(0, 54), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO54"), + MTK_FUNCTION(1, "BPI_OLAT1") + ), + MTK_PIN( + 55, "GPIO55", + MTK_EINT_FUNCTION(0, 55), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO55"), + MTK_FUNCTION(1, "BPI_BUS8") + ), + MTK_PIN( + 56, "GPIO56", + MTK_EINT_FUNCTION(0, 56), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO56"), + MTK_FUNCTION(1, "BPI_BUS9"), + MTK_FUNCTION(2, "SCL_6306") + ), + MTK_PIN( + 57, "GPIO57", + MTK_EINT_FUNCTION(0, 57), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO57"), + MTK_FUNCTION(1, "BPI_BUS10"), + MTK_FUNCTION(2, "SDA_6306") + ), + MTK_PIN( + 58, "GPIO58", + MTK_EINT_FUNCTION(0, 58), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO58"), + MTK_FUNCTION(1, "RFIC0_BSI_D2"), + MTK_FUNCTION(2, "SPM_BSI_D2"), + MTK_FUNCTION(3, "PWM_B") + ), + MTK_PIN( + 59, "GPIO59", + MTK_EINT_FUNCTION(0, 59), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO59"), + MTK_FUNCTION(1, "RFIC0_BSI_D1"), + MTK_FUNCTION(2, "SPM_BSI_D1") + ), + MTK_PIN( + 60, "GPIO60", + MTK_EINT_FUNCTION(0, 60), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO60"), + MTK_FUNCTION(1, "RFIC0_BSI_D0"), + MTK_FUNCTION(2, "SPM_BSI_D0") + ), + MTK_PIN( + 61, "GPIO61", + MTK_EINT_FUNCTION(0, 61), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO61"), + MTK_FUNCTION(1, "MIPI1_SDATA") + ), + MTK_PIN( + 62, "GPIO62", + MTK_EINT_FUNCTION(0, 62), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO62"), + MTK_FUNCTION(1, "MIPI1_SCLK") + ), + MTK_PIN( + 63, "GPIO63", + MTK_EINT_FUNCTION(0, 63), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO63"), + MTK_FUNCTION(1, "MIPI0_SDATA") + ), + MTK_PIN( + 64, "GPIO64", + MTK_EINT_FUNCTION(0, 64), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO64"), + MTK_FUNCTION(1, "MIPI0_SCLK") + ), + MTK_PIN( + 65, "GPIO65", + MTK_EINT_FUNCTION(0, 65), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO65"), + MTK_FUNCTION(1, "MIPI3_SDATA"), + MTK_FUNCTION(2, "BPI_OLAT2") + ), + MTK_PIN( + 66, "GPIO66", + MTK_EINT_FUNCTION(0, 66), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO66"), + MTK_FUNCTION(1, "MIPI3_SCLK"), + MTK_FUNCTION(2, "BPI_OLAT3") + ), + MTK_PIN( + 67, "GPIO67", + MTK_EINT_FUNCTION(0, 67), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO67"), + MTK_FUNCTION(1, "MIPI2_SDATA") + ), + MTK_PIN( + 68, "GPIO68", + MTK_EINT_FUNCTION(0, 68), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO68"), + MTK_FUNCTION(1, "MIPI2_SCLK") + ), + MTK_PIN( + 69, "GPIO69", + MTK_EINT_FUNCTION(0, 69), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO69"), + MTK_FUNCTION(1, "BPI_BUS7") + ), + MTK_PIN( + 70, "GPIO70", + MTK_EINT_FUNCTION(0, 70), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO70"), + MTK_FUNCTION(1, "BPI_BUS6") + ), + MTK_PIN( + 71, "GPIO71", + MTK_EINT_FUNCTION(0, 71), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO71"), + MTK_FUNCTION(1, "BPI_BUS5") + ), + MTK_PIN( + 72, "GPIO72", + MTK_EINT_FUNCTION(0, 72), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO72"), + MTK_FUNCTION(1, "BPI_BUS4") + ), + MTK_PIN( + 73, "GPIO73", + MTK_EINT_FUNCTION(0, 73), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO73"), + MTK_FUNCTION(1, "BPI_BUS3") + ), + MTK_PIN( + 74, "GPIO74", + MTK_EINT_FUNCTION(0, 74), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO74"), + MTK_FUNCTION(1, "BPI_BUS2") + ), + MTK_PIN( + 75, "GPIO75", + MTK_EINT_FUNCTION(0, 75), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO75"), + MTK_FUNCTION(1, "BPI_BUS1") + ), + MTK_PIN( + 76, "GPIO76", + MTK_EINT_FUNCTION(0, 76), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO76"), + MTK_FUNCTION(1, "BPI_BUS0") + ), + MTK_PIN( + 77, "GPIO77", + MTK_EINT_FUNCTION(0, 77), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO77"), + MTK_FUNCTION(1, "BPI_ANT1") + ), + MTK_PIN( + 78, "GPIO78", + MTK_EINT_FUNCTION(0, 78), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO78"), + MTK_FUNCTION(1, "BPI_OLAT0") + ), + MTK_PIN( + 79, "GPIO79", + MTK_EINT_FUNCTION(0, 79), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO79"), + MTK_FUNCTION(1, "BPI_PA_VM1"), + MTK_FUNCTION(2, "MIPI4_SDATA") + ), + MTK_PIN( + 80, "GPIO80", + MTK_EINT_FUNCTION(0, 80), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO80"), + MTK_FUNCTION(1, "BPI_PA_VM0"), + MTK_FUNCTION(2, "MIPI4_SCLK") + ), + MTK_PIN( + 81, "GPIO81", + MTK_EINT_FUNCTION(0, 81), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO81"), + MTK_FUNCTION(1, "SDA1") + ), + MTK_PIN( + 82, "GPIO82", + MTK_EINT_FUNCTION(0, 82), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO82"), + MTK_FUNCTION(1, "SDA0") + ), + MTK_PIN( + 83, "GPIO83", + MTK_EINT_FUNCTION(0, 83), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO83"), + MTK_FUNCTION(1, "SCL0") + ), + MTK_PIN( + 84, "GPIO84", + MTK_EINT_FUNCTION(0, 84), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO84"), + MTK_FUNCTION(1, "SCL1") + ), + MTK_PIN( + 85, "GPIO85", + MTK_EINT_FUNCTION(0, 85), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO85"), + MTK_FUNCTION(1, "SPI0_MI"), + MTK_FUNCTION(2, "SCP_SPI0_MI"), + MTK_FUNCTION(3, "CLKM3"), + MTK_FUNCTION(4, "I2S1_BCK"), + MTK_FUNCTION(5, "MFG_DFD_JTAG_TDO"), + MTK_FUNCTION(6, "DFD_TDO"), + MTK_FUNCTION(7, "JTDO_SEL1") + ), + MTK_PIN( + 86, "GPIO86", + MTK_EINT_FUNCTION(0, 86), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO86"), + MTK_FUNCTION(1, "SPI0_CSB"), + MTK_FUNCTION(2, "SCP_SPI0_CS"), + MTK_FUNCTION(3, "CLKM0"), + MTK_FUNCTION(4, "I2S1_LRCK"), + MTK_FUNCTION(5, "MFG_DFD_JTAG_TMS"), + MTK_FUNCTION(6, "DFD_TMS"), + MTK_FUNCTION(7, "JTMS_SEL1") + ), + MTK_PIN( + 87, "GPIO87", + MTK_EINT_FUNCTION(0, 87), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO87"), + MTK_FUNCTION(1, "SPI0_MO"), + MTK_FUNCTION(2, "SCP_SPI0_MO"), + MTK_FUNCTION(3, "SDA1"), + MTK_FUNCTION(4, "I2S1_DO"), + MTK_FUNCTION(5, "MFG_DFD_JTAG_TDI"), + MTK_FUNCTION(6, "DFD_TDI"), + MTK_FUNCTION(7, "JTDI_SEL1") + ), + MTK_PIN( + 88, "GPIO88", + MTK_EINT_FUNCTION(0, 88), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO88"), + MTK_FUNCTION(1, "SPI0_CLK"), + MTK_FUNCTION(2, "SCP_SPI0_CK"), + MTK_FUNCTION(3, "SCL1"), + MTK_FUNCTION(4, "I2S1_MCK"), + MTK_FUNCTION(5, "MFG_DFD_JTAG_TCK"), + MTK_FUNCTION(6, "DFD_TCK_XI"), + MTK_FUNCTION(7, "JTCK_SEL1") + ), + MTK_PIN( + 89, "GPIO89", + MTK_EINT_FUNCTION(0, 89), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO89"), + MTK_FUNCTION(1, "SRCLKENAI0"), + MTK_FUNCTION(2, "PWM_C"), + MTK_FUNCTION(3, "I2S5_BCK"), + MTK_FUNCTION(4, "ANT_SEL6"), + MTK_FUNCTION(5, "SDA8"), + MTK_FUNCTION(6, "CMVREF0"), + MTK_FUNCTION(7, "DBG_MON_A21") + ), + MTK_PIN( + 90, "GPIO90", + MTK_EINT_FUNCTION(0, 90), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO90"), + MTK_FUNCTION(1, "PWM_A"), + MTK_FUNCTION(2, "CMMCLK2"), + MTK_FUNCTION(3, "I2S5_LRCK"), + MTK_FUNCTION(4, "SCP_VREQ_VAO"), + MTK_FUNCTION(5, "SCL8"), + MTK_FUNCTION(6, "PTA_RXD"), + MTK_FUNCTION(7, "DBG_MON_A22") + ), + MTK_PIN( + 91, "GPIO91", + MTK_EINT_FUNCTION(0, 91), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO91"), + MTK_FUNCTION(1, "KPROW1"), + MTK_FUNCTION(2, "PWM_B"), + MTK_FUNCTION(3, "I2S5_DO"), + MTK_FUNCTION(4, "ANT_SEL7"), + MTK_FUNCTION(5, "CMMCLK3"), + MTK_FUNCTION(6, "PTA_TXD") + ), + MTK_PIN( + 92, "GPIO92", + MTK_EINT_FUNCTION(0, 92), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO92"), + MTK_FUNCTION(1, "KPROW0") + ), + MTK_PIN( + 93, "GPIO93", + MTK_EINT_FUNCTION(0, 93), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO93"), + MTK_FUNCTION(1, "KPCOL0"), + MTK_FUNCTION(7, "DBG_MON_B27") + ), + MTK_PIN( + 94, "GPIO94", + MTK_EINT_FUNCTION(0, 94), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO94"), + MTK_FUNCTION(1, "KPCOL1"), + MTK_FUNCTION(2, "I2S2_DI2"), + MTK_FUNCTION(3, "I2S5_MCK"), + MTK_FUNCTION(4, "CMMCLK2"), + MTK_FUNCTION(5, "SCP_SPI2_MI"), + MTK_FUNCTION(6, "SRCLKENAI1"), + MTK_FUNCTION(7, "SPI2_MI") + ), + MTK_PIN( + 95, "GPIO95", + MTK_EINT_FUNCTION(0, 95), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO95"), + MTK_FUNCTION(1, "URXD0"), + MTK_FUNCTION(2, "UTXD0"), + MTK_FUNCTION(3, "MD_URXD0"), + MTK_FUNCTION(4, "MD_URXD1"), + MTK_FUNCTION(5, "SSPM_URXD_AO"), + MTK_FUNCTION(6, "CCU_URXD_AO") + ), + MTK_PIN( + 96, "GPIO96", + MTK_EINT_FUNCTION(0, 96), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO96"), + MTK_FUNCTION(1, "UTXD0"), + MTK_FUNCTION(2, "URXD0"), + MTK_FUNCTION(3, "MD_UTXD0"), + MTK_FUNCTION(4, "MD_UTXD1"), + MTK_FUNCTION(5, "SSPM_UTXD_AO"), + MTK_FUNCTION(6, "CCU_UTXD_AO"), + MTK_FUNCTION(7, "DBG_MON_B2") + ), + MTK_PIN( + 97, "GPIO97", + MTK_EINT_FUNCTION(0, 97), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO97"), + MTK_FUNCTION(1, "UCTS0"), + MTK_FUNCTION(2, "I2S2_MCK"), + MTK_FUNCTION(3, "IDDIG"), + MTK_FUNCTION(4, "CONN_MCU_TDO"), + MTK_FUNCTION(5, "SSPM_JTAG_TDO"), + MTK_FUNCTION(6, "IO_JTAG_TDO"), + MTK_FUNCTION(7, "DBG_MON_B3") + ), + MTK_PIN( + 98, "GPIO98", + MTK_EINT_FUNCTION(0, 98), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO98"), + MTK_FUNCTION(1, "URTS0"), + MTK_FUNCTION(2, "I2S2_BCK"), + MTK_FUNCTION(3, "USB_DRVVBUS"), + MTK_FUNCTION(4, "CONN_MCU_TMS"), + MTK_FUNCTION(5, "SSPM_JTAG_TMS"), + MTK_FUNCTION(6, "IO_JTAG_TMS"), + MTK_FUNCTION(7, "DBG_MON_B4") + ), + MTK_PIN( + 99, "GPIO99", + MTK_EINT_FUNCTION(0, 99), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO99"), + MTK_FUNCTION(1, "CMMCLK0"), + MTK_FUNCTION(4, "CONN_MCU_AICE_TMSC"), + MTK_FUNCTION(7, "DBG_MON_B28") + ), + MTK_PIN( + 100, "GPIO100", + MTK_EINT_FUNCTION(0, 100), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO100"), + MTK_FUNCTION(1, "CMMCLK1"), + MTK_FUNCTION(2, "PWM_C"), + MTK_FUNCTION(3, "MD_INT1_C2K_UIM0_HOT_PLUG"), + MTK_FUNCTION(4, "CONN_MCU_AICE_TCKC"), + MTK_FUNCTION(7, "DBG_MON_B29") + ), + MTK_PIN( + 101, "GPIO101", + MTK_EINT_FUNCTION(0, 101), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO101"), + MTK_FUNCTION(1, "CLKM2"), + MTK_FUNCTION(2, "I2S2_LRCK"), + MTK_FUNCTION(3, "CMVREF1"), + MTK_FUNCTION(4, "CONN_MCU_TCK"), + MTK_FUNCTION(5, "SSPM_JTAG_TCK"), + MTK_FUNCTION(6, "IO_JTAG_TCK") + ), + MTK_PIN( + 102, "GPIO102", + MTK_EINT_FUNCTION(0, 102), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO102"), + MTK_FUNCTION(1, "CLKM1"), + MTK_FUNCTION(2, "I2S2_DI"), + MTK_FUNCTION(3, "DVFSRC_EXT_REQ"), + MTK_FUNCTION(4, "CONN_MCU_TDI"), + MTK_FUNCTION(5, "SSPM_JTAG_TDI"), + MTK_FUNCTION(6, "IO_JTAG_TDI"), + MTK_FUNCTION(7, "DBG_MON_B8") + ), + MTK_PIN( + 103, "GPIO103", + MTK_EINT_FUNCTION(0, 103), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO103"), + MTK_FUNCTION(1, "SCL2") + ), + MTK_PIN( + 104, "GPIO104", + MTK_EINT_FUNCTION(0, 104), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO104"), + MTK_FUNCTION(1, "SDA2") + ), + MTK_PIN( + 105, "GPIO105", + MTK_EINT_FUNCTION(0, 105), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO105"), + MTK_FUNCTION(1, "SCL4") + ), + MTK_PIN( + 106, "GPIO106", + MTK_EINT_FUNCTION(0, 106), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO106"), + MTK_FUNCTION(1, "SDA4") + ), + MTK_PIN( + 107, "GPIO107", + MTK_EINT_FUNCTION(0, 107), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO107"), + MTK_FUNCTION(1, "DMIC_CLK"), + MTK_FUNCTION(2, "ANT_SEL0"), + MTK_FUNCTION(3, "CLKM0"), + MTK_FUNCTION(4, "SDA7"), + MTK_FUNCTION(5, "EXT_FRAME_SYNC"), + MTK_FUNCTION(6, "PWM_A"), + MTK_FUNCTION(7, "DBG_MON_B12") + ), + MTK_PIN( + 108, "GPIO108", + MTK_EINT_FUNCTION(0, 108), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO108"), + MTK_FUNCTION(1, "CMMCLK2"), + MTK_FUNCTION(2, "ANT_SEL1"), + MTK_FUNCTION(3, "CLKM1"), + MTK_FUNCTION(4, "SCL8"), + MTK_FUNCTION(5, "DAP_MD32_SWD"), + MTK_FUNCTION(6, "PWM_B"), + MTK_FUNCTION(7, "DBG_MON_B13") + ), + MTK_PIN( + 109, "GPIO109", + MTK_EINT_FUNCTION(0, 109), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO109"), + MTK_FUNCTION(1, "DMIC_DAT"), + MTK_FUNCTION(2, "ANT_SEL2"), + MTK_FUNCTION(3, "CLKM2"), + MTK_FUNCTION(4, "SDA8"), + MTK_FUNCTION(5, "DAP_MD32_SWCK"), + MTK_FUNCTION(6, "PWM_C"), + MTK_FUNCTION(7, "DBG_MON_B14") + ), + MTK_PIN( + 110, "GPIO110", + MTK_EINT_FUNCTION(0, 110), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO110"), + MTK_FUNCTION(1, "SCL7"), + MTK_FUNCTION(2, "ANT_SEL0"), + MTK_FUNCTION(3, "TP_URXD1_AO"), + MTK_FUNCTION(4, "USB_DRVVBUS"), + MTK_FUNCTION(5, "SRCLKENAI1"), + MTK_FUNCTION(6, "KPCOL2"), + MTK_FUNCTION(7, "URXD1") + ), + MTK_PIN( + 111, "GPIO111", + MTK_EINT_FUNCTION(0, 111), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO111"), + MTK_FUNCTION(1, "CMMCLK3"), + MTK_FUNCTION(2, "ANT_SEL1"), + MTK_FUNCTION(3, "SRCLKENAI0"), + MTK_FUNCTION(4, "SCP_VREQ_VAO"), + MTK_FUNCTION(5, "MD_INT2_C2K_UIM1_HOT_PLUG"), + MTK_FUNCTION(7, "DVFSRC_EXT_REQ") + ), + MTK_PIN( + 112, "GPIO112", + MTK_EINT_FUNCTION(0, 112), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO112"), + MTK_FUNCTION(1, "SDA7"), + MTK_FUNCTION(2, "ANT_SEL2"), + MTK_FUNCTION(3, "TP_UTXD1_AO"), + MTK_FUNCTION(4, "IDDIG"), + MTK_FUNCTION(5, "AGPS_SYNC"), + MTK_FUNCTION(6, "KPROW2"), + MTK_FUNCTION(7, "UTXD1") + ), + MTK_PIN( + 113, "GPIO113", + MTK_EINT_FUNCTION(0, 113), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO113"), + MTK_FUNCTION(1, "CONN_TOP_CLK"), + MTK_FUNCTION(3, "SCL6"), + MTK_FUNCTION(4, "AUXIF_CLK0"), + MTK_FUNCTION(6, "TP_UCTS1_AO") + ), + MTK_PIN( + 114, "GPIO114", + MTK_EINT_FUNCTION(0, 114), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO114"), + MTK_FUNCTION(1, "CONN_TOP_DATA"), + MTK_FUNCTION(3, "SDA6"), + MTK_FUNCTION(4, "AUXIF_ST0"), + MTK_FUNCTION(6, "TP_URTS1_AO") + ), + MTK_PIN( + 115, "GPIO115", + MTK_EINT_FUNCTION(0, 115), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO115"), + MTK_FUNCTION(1, "CONN_BT_CLK"), + MTK_FUNCTION(2, "UTXD1"), + MTK_FUNCTION(3, "PTA_TXD"), + MTK_FUNCTION(4, "AUXIF_CLK1"), + MTK_FUNCTION(5, "DAP_MD32_SWD"), + MTK_FUNCTION(6, "TP_UTXD1_AO") + ), + MTK_PIN( + 116, "GPIO116", + MTK_EINT_FUNCTION(0, 116), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO116"), + MTK_FUNCTION(1, "CONN_BT_DATA"), + MTK_FUNCTION(2, "IPU_JTAG_TRST"), + MTK_FUNCTION(4, "AUXIF_ST1"), + MTK_FUNCTION(5, "DAP_MD32_SWCK"), + MTK_FUNCTION(6, "TP_URXD2_AO"), + MTK_FUNCTION(7, "DBG_MON_A0") + ), + MTK_PIN( + 117, "GPIO117", + MTK_EINT_FUNCTION(0, 117), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO117"), + MTK_FUNCTION(1, "CONN_WF_HB0"), + MTK_FUNCTION(2, "IPU_JTAG_TDO"), + MTK_FUNCTION(6, "TP_UTXD2_AO"), + MTK_FUNCTION(7, "DBG_MON_A4") + ), + MTK_PIN( + 118, "GPIO118", + MTK_EINT_FUNCTION(0, 118), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO118"), + MTK_FUNCTION(1, "CONN_WF_HB1"), + MTK_FUNCTION(2, "IPU_JTAG_TDI"), + MTK_FUNCTION(5, "SSPM_URXD_AO"), + MTK_FUNCTION(6, "TP_UCTS2_AO"), + MTK_FUNCTION(7, "DBG_MON_A5") + ), + MTK_PIN( + 119, "GPIO119", + MTK_EINT_FUNCTION(0, 119), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO119"), + MTK_FUNCTION(1, "CONN_WF_HB2"), + MTK_FUNCTION(2, "IPU_JTAG_TCK"), + MTK_FUNCTION(5, "SSPM_UTXD_AO"), + MTK_FUNCTION(6, "TP_URTS2_AO") + ), + MTK_PIN( + 120, "GPIO120", + MTK_EINT_FUNCTION(0, 120), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO120"), + MTK_FUNCTION(1, "CONN_WB_PTA"), + MTK_FUNCTION(2, "IPU_JTAG_TMS"), + MTK_FUNCTION(5, "CCU_URXD_AO") + ), + MTK_PIN( + 121, "GPIO121", + MTK_EINT_FUNCTION(0, 121), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO121"), + MTK_FUNCTION(1, "CONN_HRST_B"), + MTK_FUNCTION(2, "URXD1"), + MTK_FUNCTION(3, "PTA_RXD"), + MTK_FUNCTION(5, "CCU_UTXD_AO"), + MTK_FUNCTION(6, "TP_URXD1_AO") + ), + MTK_PIN( + 122, "GPIO122", + MTK_EINT_FUNCTION(0, 122), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO122"), + MTK_FUNCTION(1, "MSDC0_CMD"), + MTK_FUNCTION(2, "SSPM_URXD2_AO"), + MTK_FUNCTION(3, "ANT_SEL1"), + MTK_FUNCTION(7, "DBG_MON_A12") + ), + MTK_PIN( + 123, "GPIO123", + MTK_EINT_FUNCTION(0, 123), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO123"), + MTK_FUNCTION(1, "MSDC0_DAT0"), + MTK_FUNCTION(3, "ANT_SEL0"), + MTK_FUNCTION(7, "DBG_MON_A13") + ), + MTK_PIN( + 124, "GPIO124", + MTK_EINT_FUNCTION(0, 124), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO124"), + MTK_FUNCTION(1, "MSDC0_CLK"), + MTK_FUNCTION(7, "DBG_MON_A14") + ), + MTK_PIN( + 125, "GPIO125", + MTK_EINT_FUNCTION(0, 125), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO125"), + MTK_FUNCTION(1, "MSDC0_DAT2"), + MTK_FUNCTION(3, "MRG_CLK"), + MTK_FUNCTION(7, "DBG_MON_A15") + ), + MTK_PIN( + 126, "GPIO126", + MTK_EINT_FUNCTION(0, 126), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO126"), + MTK_FUNCTION(1, "MSDC0_DAT4"), + MTK_FUNCTION(3, "ANT_SEL5"), + MTK_FUNCTION(6, "UFS_MPHY_SCL"), + MTK_FUNCTION(7, "DBG_MON_A16") + ), + MTK_PIN( + 127, "GPIO127", + MTK_EINT_FUNCTION(0, 127), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO127"), + MTK_FUNCTION(1, "MSDC0_DAT6"), + MTK_FUNCTION(3, "ANT_SEL4"), + MTK_FUNCTION(6, "UFS_MPHY_SDA"), + MTK_FUNCTION(7, "DBG_MON_A17") + ), + MTK_PIN( + 128, "GPIO128", + MTK_EINT_FUNCTION(0, 128), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO128"), + MTK_FUNCTION(1, "MSDC0_DAT1"), + MTK_FUNCTION(3, "ANT_SEL2"), + MTK_FUNCTION(6, "UFS_UNIPRO_SDA"), + MTK_FUNCTION(7, "DBG_MON_A18") + ), + MTK_PIN( + 129, "GPIO129", + MTK_EINT_FUNCTION(0, 129), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO129"), + MTK_FUNCTION(1, "MSDC0_DAT5"), + MTK_FUNCTION(3, "ANT_SEL3"), + MTK_FUNCTION(6, "UFS_UNIPRO_SCL"), + MTK_FUNCTION(7, "DBG_MON_A23") + ), + MTK_PIN( + 130, "GPIO130", + MTK_EINT_FUNCTION(0, 130), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO130"), + MTK_FUNCTION(1, "MSDC0_DAT7"), + MTK_FUNCTION(3, "MRG_DO"), + MTK_FUNCTION(7, "DBG_MON_A24") + ), + MTK_PIN( + 131, "GPIO131", + MTK_EINT_FUNCTION(0, 131), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO131"), + MTK_FUNCTION(1, "MSDC0_DSL"), + MTK_FUNCTION(3, "MRG_SYNC"), + MTK_FUNCTION(7, "DBG_MON_A25") + ), + MTK_PIN( + 132, "GPIO132", + MTK_EINT_FUNCTION(0, 132), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO132"), + MTK_FUNCTION(1, "MSDC0_DAT3"), + MTK_FUNCTION(3, "MRG_DI"), + MTK_FUNCTION(7, "DBG_MON_A26") + ), + MTK_PIN( + 133, "GPIO133", + MTK_EINT_FUNCTION(0, 133), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO133"), + MTK_FUNCTION(1, "MSDC0_RSTB"), + MTK_FUNCTION(3, "AGPS_SYNC"), + MTK_FUNCTION(7, "DBG_MON_A27") + ), + MTK_PIN( + 134, "GPIO134", + MTK_EINT_FUNCTION(0, 134), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO134"), + MTK_FUNCTION(1, "RTC32K_CK") + ), + MTK_PIN( + 135, "GPIO135", + MTK_EINT_FUNCTION(0, 135), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO135"), + MTK_FUNCTION(1, "WATCHDOG") + ), + MTK_PIN( + 136, "GPIO136", + MTK_EINT_FUNCTION(0, 136), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO136"), + MTK_FUNCTION(1, "AUD_CLK_MOSI"), + MTK_FUNCTION(2, "AUD_CLK_MISO"), + MTK_FUNCTION(3, "I2S1_MCK"), + MTK_FUNCTION(6, "UFS_UNIPRO_SCL") + ), + MTK_PIN( + 137, "GPIO137", + MTK_EINT_FUNCTION(0, 137), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO137"), + MTK_FUNCTION(1, "AUD_SYNC_MOSI"), + MTK_FUNCTION(2, "AUD_SYNC_MISO"), + MTK_FUNCTION(3, "I2S1_BCK") + ), + MTK_PIN( + 138, "GPIO138", + MTK_EINT_FUNCTION(0, 138), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO138"), + MTK_FUNCTION(1, "AUD_DAT_MOSI0"), + MTK_FUNCTION(2, "AUD_DAT_MISO0"), + MTK_FUNCTION(3, "I2S1_LRCK"), + MTK_FUNCTION(7, "DBG_MON_B24") + ), + MTK_PIN( + 139, "GPIO139", + MTK_EINT_FUNCTION(0, 139), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO139"), + MTK_FUNCTION(1, "AUD_DAT_MOSI1"), + MTK_FUNCTION(2, "AUD_DAT_MISO1"), + MTK_FUNCTION(3, "I2S1_DO"), + MTK_FUNCTION(6, "UFS_MPHY_SDA") + ), + MTK_PIN( + 140, "GPIO140", + MTK_EINT_FUNCTION(0, 140), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO140"), + MTK_FUNCTION(1, "AUD_CLK_MISO"), + MTK_FUNCTION(2, "AUD_CLK_MOSI"), + MTK_FUNCTION(3, "I2S0_MCK"), + MTK_FUNCTION(6, "UFS_UNIPRO_SDA") + ), + MTK_PIN( + 141, "GPIO141", + MTK_EINT_FUNCTION(0, 141), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO141"), + MTK_FUNCTION(1, "AUD_SYNC_MISO"), + MTK_FUNCTION(2, "AUD_SYNC_MOSI"), + MTK_FUNCTION(3, "I2S0_BCK") + ), + MTK_PIN( + 142, "GPIO142", + MTK_EINT_FUNCTION(0, 142), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO142"), + MTK_FUNCTION(1, "AUD_DAT_MISO0"), + MTK_FUNCTION(2, "AUD_DAT_MOSI0"), + MTK_FUNCTION(3, "I2S0_LRCK"), + MTK_FUNCTION(4, "VOW_DAT_MISO"), + MTK_FUNCTION(7, "DBG_MON_B25") + ), + MTK_PIN( + 143, "GPIO143", + MTK_EINT_FUNCTION(0, 143), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO143"), + MTK_FUNCTION(1, "AUD_DAT_MISO1"), + MTK_FUNCTION(2, "AUD_DAT_MOSI1"), + MTK_FUNCTION(3, "I2S0_DI"), + MTK_FUNCTION(4, "VOW_CLK_MISO"), + MTK_FUNCTION(6, "UFS_MPHY_SCL"), + MTK_FUNCTION(7, "DBG_MON_B26") + ), + MTK_PIN( + 144, "GPIO144", + MTK_EINT_FUNCTION(0, 144), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO144"), + MTK_FUNCTION(1, "PWRAP_SPI0_MI"), + MTK_FUNCTION(2, "PWRAP_SPI0_MO") + ), + MTK_PIN( + 145, "GPIO145", + MTK_EINT_FUNCTION(0, 145), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO145"), + MTK_FUNCTION(1, "PWRAP_SPI0_CSN") + ), + MTK_PIN( + 146, "GPIO146", + MTK_EINT_FUNCTION(0, 146), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO146"), + MTK_FUNCTION(1, "PWRAP_SPI0_MO"), + MTK_FUNCTION(2, "PWRAP_SPI0_MI") + ), + MTK_PIN( + 147, "GPIO147", + MTK_EINT_FUNCTION(0, 147), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO147"), + MTK_FUNCTION(1, "PWRAP_SPI0_CK") + ), + MTK_PIN( + 148, "GPIO148", + MTK_EINT_FUNCTION(0, 148), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO148"), + MTK_FUNCTION(1, "SRCLKENA0") + ), + MTK_PIN( + 149, "GPIO149", + MTK_EINT_FUNCTION(0, 149), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO149"), + MTK_FUNCTION(1, "SRCLKENA1") + ), + MTK_PIN( + 150, "GPIO150", + MTK_EINT_FUNCTION(0, 150), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO150"), + MTK_FUNCTION(1, "PWM_A"), + MTK_FUNCTION(2, "CMFLASH"), + MTK_FUNCTION(3, "CLKM0"), + MTK_FUNCTION(7, "DBG_MON_B30") + ), + MTK_PIN( + 151, "GPIO151", + MTK_EINT_FUNCTION(0, 151), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO151"), + MTK_FUNCTION(1, "PWM_B"), + MTK_FUNCTION(2, "CMVREF0"), + MTK_FUNCTION(3, "CLKM1"), + MTK_FUNCTION(7, "DBG_MON_B20") + ), + MTK_PIN( + 152, "GPIO152", + MTK_EINT_FUNCTION(0, 152), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO152"), + MTK_FUNCTION(1, "PWM_C"), + MTK_FUNCTION(2, "CMFLASH"), + MTK_FUNCTION(3, "CLKM2"), + MTK_FUNCTION(7, "DBG_MON_B21") + ), + MTK_PIN( + 153, "GPIO153", + MTK_EINT_FUNCTION(0, 153), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO153"), + MTK_FUNCTION(1, "PWM_A"), + MTK_FUNCTION(2, "CMVREF0"), + MTK_FUNCTION(3, "CLKM3"), + MTK_FUNCTION(7, "DBG_MON_B22") + ), + MTK_PIN( + 154, "GPIO154", + MTK_EINT_FUNCTION(0, 154), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO154"), + MTK_FUNCTION(1, "SCP_VREQ_VAO"), + MTK_FUNCTION(2, "DVFSRC_EXT_REQ"), + MTK_FUNCTION(7, "DBG_MON_B18") + ), + MTK_PIN( + 155, "GPIO155", + MTK_EINT_FUNCTION(0, 155), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO155"), + MTK_FUNCTION(1, "ANT_SEL0"), + MTK_FUNCTION(2, "DVFSRC_EXT_REQ"), + MTK_FUNCTION(3, "CMVREF1"), + MTK_FUNCTION(7, "SCP_JTAG_TDI") + ), + MTK_PIN( + 156, "GPIO156", + MTK_EINT_FUNCTION(0, 156), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO156"), + MTK_FUNCTION(1, "ANT_SEL1"), + MTK_FUNCTION(2, "SRCLKENAI0"), + MTK_FUNCTION(3, "SCL6"), + MTK_FUNCTION(4, "KPCOL2"), + MTK_FUNCTION(5, "IDDIG"), + MTK_FUNCTION(7, "SCP_JTAG_TCK") + ), + MTK_PIN( + 157, "GPIO157", + MTK_EINT_FUNCTION(0, 157), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO157"), + MTK_FUNCTION(1, "ANT_SEL2"), + MTK_FUNCTION(2, "SRCLKENAI1"), + MTK_FUNCTION(3, "SDA6"), + MTK_FUNCTION(4, "KPROW2"), + MTK_FUNCTION(5, "USB_DRVVBUS"), + MTK_FUNCTION(7, "SCP_JTAG_TRSTN") + ), + MTK_PIN( + 158, "GPIO158", + MTK_EINT_FUNCTION(0, 158), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO158"), + MTK_FUNCTION(1, "ANT_SEL3") + ), + MTK_PIN( + 159, "GPIO159", + MTK_EINT_FUNCTION(0, 159), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO159"), + MTK_FUNCTION(1, "ANT_SEL4") + ), + MTK_PIN( + 160, "GPIO160", + MTK_EINT_FUNCTION(0, 160), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO160"), + MTK_FUNCTION(1, "ANT_SEL5") + ), + MTK_PIN( + 161, "GPIO161", + MTK_EINT_FUNCTION(0, 161), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO161"), + MTK_FUNCTION(1, "SPI1_A_MI"), + MTK_FUNCTION(2, "SCP_SPI1_MI"), + MTK_FUNCTION(3, "IDDIG"), + MTK_FUNCTION(4, "ANT_SEL6"), + MTK_FUNCTION(5, "KPCOL2"), + MTK_FUNCTION(6, "PTA_RXD"), + MTK_FUNCTION(7, "DBG_MON_B19") + ), + MTK_PIN( + 162, "GPIO162", + MTK_EINT_FUNCTION(0, 162), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO162"), + MTK_FUNCTION(1, "SPI1_A_CSB"), + MTK_FUNCTION(2, "SCP_SPI1_CS"), + MTK_FUNCTION(3, "USB_DRVVBUS"), + MTK_FUNCTION(4, "ANT_SEL5"), + MTK_FUNCTION(5, "KPROW2"), + MTK_FUNCTION(6, "PTA_TXD") + ), + MTK_PIN( + 163, "GPIO163", + MTK_EINT_FUNCTION(0, 163), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO163"), + MTK_FUNCTION(1, "SPI1_A_MO"), + MTK_FUNCTION(2, "SCP_SPI1_MO"), + MTK_FUNCTION(3, "SDA1"), + MTK_FUNCTION(4, "ANT_SEL4"), + MTK_FUNCTION(5, "CMMCLK2"), + MTK_FUNCTION(6, "DMIC_CLK") + ), + MTK_PIN( + 164, "GPIO164", + MTK_EINT_FUNCTION(0, 164), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO164"), + MTK_FUNCTION(1, "SPI1_A_CLK"), + MTK_FUNCTION(2, "SCP_SPI1_CK"), + MTK_FUNCTION(3, "SCL1"), + MTK_FUNCTION(4, "ANT_SEL3"), + MTK_FUNCTION(5, "CMMCLK3"), + MTK_FUNCTION(6, "DMIC_DAT") + ), + MTK_PIN( + 165, "GPIO165", + MTK_EINT_FUNCTION(0, 165), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO165"), + MTK_FUNCTION(1, "PWM_B"), + MTK_FUNCTION(2, "CMMCLK2"), + MTK_FUNCTION(3, "SCP_VREQ_VAO"), + MTK_FUNCTION(6, "TDM_MCK_2ND"), + MTK_FUNCTION(7, "SCP_JTAG_TDO") + ), + MTK_PIN( + 166, "GPIO166", + MTK_EINT_FUNCTION(0, 166), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO166"), + MTK_FUNCTION(1, "ANT_SEL6") + ), + MTK_PIN( + 167, "GPIO167", + MTK_EINT_FUNCTION(0, 167), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO167"), + MTK_FUNCTION(1, "RFIC0_BSI_EN"), + MTK_FUNCTION(2, "SPM_BSI_EN") + ), + MTK_PIN( + 168, "GPIO168", + MTK_EINT_FUNCTION(0, 168), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO168"), + MTK_FUNCTION(1, "RFIC0_BSI_CK"), + MTK_FUNCTION(2, "SPM_BSI_CK") + ), + MTK_PIN( + 169, "GPIO169", + MTK_EINT_FUNCTION(0, 169), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO169"), + MTK_FUNCTION(1, "PWM_C"), + MTK_FUNCTION(2, "CMMCLK3"), + MTK_FUNCTION(3, "CMVREF1"), + MTK_FUNCTION(4, "ANT_SEL7"), + MTK_FUNCTION(5, "AGPS_SYNC"), + MTK_FUNCTION(6, "TDM_BCK_2ND"), + MTK_FUNCTION(7, "SCP_JTAG_TMS") + ), + MTK_PIN( + 170, "GPIO170", + MTK_EINT_FUNCTION(0, 170), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO170"), + MTK_FUNCTION(1, "I2S1_BCK"), + MTK_FUNCTION(2, "I2S3_BCK"), + MTK_FUNCTION(3, "SCL7"), + MTK_FUNCTION(4, "I2S5_BCK"), + MTK_FUNCTION(5, "EXT_FRAME_SYNC"), + MTK_FUNCTION(6, "TDM_LRCK_2ND"), + MTK_FUNCTION(7, "ANT_SEL3") + ), + MTK_PIN( + 171, "GPIO171", + MTK_EINT_FUNCTION(0, 184), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO171"), + MTK_FUNCTION(1, "I2S1_LRCK"), + MTK_FUNCTION(2, "I2S3_LRCK"), + MTK_FUNCTION(3, "SDA7"), + MTK_FUNCTION(4, "I2S5_LRCK"), + MTK_FUNCTION(5, "URXD1"), + MTK_FUNCTION(6, "TDM_DATA0_2ND"), + MTK_FUNCTION(7, "ANT_SEL4") + ), + MTK_PIN( + 172, "GPIO172", + MTK_EINT_FUNCTION(0, 185), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO172"), + MTK_FUNCTION(1, "I2S1_DO"), + MTK_FUNCTION(2, "I2S3_DO"), + MTK_FUNCTION(3, "SCL8"), + MTK_FUNCTION(4, "I2S5_DO"), + MTK_FUNCTION(5, "UTXD1"), + MTK_FUNCTION(6, "TDM_DATA1_2ND"), + MTK_FUNCTION(7, "ANT_SEL5") + ), + MTK_PIN( + 173, "GPIO173", + MTK_EINT_FUNCTION(0, 186), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO173"), + MTK_FUNCTION(1, "I2S1_MCK"), + MTK_FUNCTION(2, "I2S3_MCK"), + MTK_FUNCTION(3, "SDA8"), + MTK_FUNCTION(4, "I2S5_MCK"), + MTK_FUNCTION(5, "UCTS0"), + MTK_FUNCTION(6, "TDM_DATA2_2ND"), + MTK_FUNCTION(7, "ANT_SEL6") + ), + MTK_PIN( + 174, "GPIO174", + MTK_EINT_FUNCTION(0, 187), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO174"), + MTK_FUNCTION(1, "I2S2_DI"), + MTK_FUNCTION(2, "I2S0_DI"), + MTK_FUNCTION(3, "DVFSRC_EXT_REQ"), + MTK_FUNCTION(4, "I2S2_DI2"), + MTK_FUNCTION(5, "URTS0"), + MTK_FUNCTION(6, "TDM_DATA3_2ND"), + MTK_FUNCTION(7, "ANT_SEL7") + ), + MTK_PIN( + 175, "GPIO175", + MTK_EINT_FUNCTION(0, 188), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO175"), + MTK_FUNCTION(1, "ANT_SEL7") + ), + MTK_PIN( + 176, "GPIO176", + MTK_EINT_FUNCTION(0, 189), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO176") + ), + MTK_PIN( + 177, "GPIO177", + MTK_EINT_FUNCTION(0, 190), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO177") + ), + MTK_PIN( + 178, "GPIO178", + MTK_EINT_FUNCTION(0, 191), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO178") + ), + MTK_PIN( + 179, "GPIO179", + MTK_EINT_FUNCTION(0, 192), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO179") + ), + MTK_PIN( + 180, "GPIO180", + MTK_EINT_FUNCTION(0, 171), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO180") + ), + MTK_PIN( + 181, "GPIO181", + MTK_EINT_FUNCTION(0, 172), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO181") + ), + MTK_PIN( + 182, "GPIO182", + MTK_EINT_FUNCTION(0, 173), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO182") + ), + MTK_PIN( + 183, "GPIO183", + MTK_EINT_FUNCTION(0, 174), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO183") + ), + MTK_PIN( + 184, "GPIO184", + MTK_EINT_FUNCTION(0, 175), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO184") + ), + MTK_PIN( + 185, "GPIO185", + MTK_EINT_FUNCTION(0, 177), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO185") + ), + MTK_PIN( + 186, "GPIO186", + MTK_EINT_FUNCTION(0, 178), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO186") + ), + MTK_PIN( + 187, "GPIO187", + MTK_EINT_FUNCTION(0, 179), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO187") + ), + MTK_PIN( + 188, "GPIO188", + MTK_EINT_FUNCTION(0, 180), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO188") + ), + MTK_PIN( + 189, "GPIO189", + MTK_EINT_FUNCTION(0, 181), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO189") + ), + MTK_PIN( + 190, "GPIO190", + MTK_EINT_FUNCTION(0, 182), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO190") + ), + MTK_PIN( + 191, "GPIO191", + MTK_EINT_FUNCTION(0, 183), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO191") + ), +}; + +#endif /* __PINCTRL_MTK_MT8183_H */ -- 2.7.4