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Date:   Mon, 10 Sep 2018 04:24:18 -0700
From:   Christoph Hellwig <hch@infradead.org>
To:     Atish Patra <atish.patra@wdc.com>
Cc:     palmer@sifive.com, linux-riscv@lists.infradead.org,
        hch@infradead.org, anup@brainfault.org, mark.rutland@arm.com,
        Damien.LeMoal@wdc.com, jason@lakedaemon.net,
        ard.biesheuvel@linaro.org, marc.zyngier@arm.com,
        gregkh@linuxfoundation.org, dmitriy@oss-tech.org,
        linux-kernel@vger.kernel.org, jeremy.linton@arm.com,
        catalin.marinas@arm.com, tglx@linutronix.de
Subject: Re: [PATCH v3 02/12] RISC-V: Filter ISA and MMU values in cpuinfo
Message-ID: <20180910112418.GB12979@infradead.org>
References: <1536221135-182613-1-git-send-email-atish.patra@wdc.com>
 <1536221135-182613-3-git-send-email-atish.patra@wdc.com>
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On Thu, Sep 06, 2018 at 01:05:25AM -0700, Atish Patra wrote:
> +#elif defined(CONFIG_64BIT)
> +	if ((strcmp(mmu_type, "riscv,sv39") != 0)
> +	    && (strcmp(mmu_type, "riscv,sv48") != 0))
> +		return;

This should be:

	if (strcmp(mmu_type, "riscv,sv39") != 0 &&
	    strcmp(mmu_type, "riscv,sv48") != 0)
		return;

Otherwise looks good:

Reviewed-by: Christoph Hellwig <hch@lst.de>