Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67;
Date:   Mon, 10 Sep 2018 16:29:05 +0100
From:   Lee Jones <lee.jones@linaro.org>
To:     Fabio Estevam <festevam@gmail.com>
Cc:     linux-kernel@vger.kernel.org, u.kleine-koenig@pengutronix.de,
        andrey.gusakov@cogentembedded.com, cphealy@gmail.com,
        Fabio Estevam <fabio.estevam@nxp.com>
Subject: Re: [PATCH] mfd: mc13xxx-core: Fix PMIC shutdown when reading ADC
 values
Message-ID: <20180910152905.GB28860@dell>
References: <1535486560-16267-1-git-send-email-festevam@gmail.com>
MIME-Version: 1.0
Content-Type: text/plain; charset=utf-8
Content-Disposition: inline
Content-Transfer-Encoding: 8bit
In-Reply-To: <1535486560-16267-1-git-send-email-festevam@gmail.com>
User-Agent: Mutt/1.9.4 (2018-02-28)
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk

On Tue, 28 Aug 2018, Fabio Estevam wrote:

> From: Fabio Estevam <fabio.estevam@nxp.com>
> 
> When trying to read any MC13892 ADC channel on a imx51-babbage board:
> 
> # cat /sys/class/hwmon/hwmon0/device/in7_input
> 
> The MC13892 PMIC shutdowns completely.
> 
> After debugging this issue and comparing the MC13892 and MC13783
> initializations done in the vendor kernel, it was noticed that the
> CHRGRAWDIV bit of the ADC0 register was not being set.
> 
> This bit is set by default after power on, but the driver was
> clearing it.
> 
> After setting this bit it is possible to read the ADC values correctly.
> 
> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
> ---
>  drivers/mfd/mc13xxx-core.c  | 3 ++-
>  include/linux/mfd/mc13xxx.h | 1 +
>  2 files changed, 3 insertions(+), 1 deletion(-)

Applied, thanks.

-- 
Lee Jones [李琼斯]
Linaro Services Technical Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog