Received: by 2002:ac0:a5a6:0:0:0:0:0 with SMTP id m35-v6csp5150561imm; Wed, 12 Sep 2018 01:43:36 -0700 (PDT) X-Google-Smtp-Source: ANB0VdbeXWKGGTO4Bfo8NbcBZcIFpDAqeUHMjZBITSaE0YFVLpXAXkiiqbNkk4Nt4m9YkHaG8QOT X-Received: by 2002:a17:902:2006:: with SMTP id n6-v6mr908080pla.325.1536741816789; Wed, 12 Sep 2018 01:43:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1536741816; cv=none; d=google.com; s=arc-20160816; b=OhVhZK9y0AzuFh1QnfACnML6lMvJt9zBUHto9yPkLM9lr46mWFFYN8uEpPkcGU6b9/ g+CoXc2nsjk8DWYoOQZjbybNPUQi2zwLpM5/w5nVnyhjBHCjpqnxyF45XnMMc4DULEH7 Pbu0hERwumIfT/gtz2vvkLTaWfFXf32JDDKzdDyzu8Qg0Nx7gWupLe0dV+cxGXoOoQnI 3XkPV7Qn0M7zto5NN4Zr6IcO8rBACpa/ZcROjDGTJDofEik3S0KfyVT44RZla3/GLpFz t+DuoPDYX+w2+810e8vYeq07D20sj+hK8QHCvyc09rQigGfrHwkbhY6u7nom/nFtVt8u PaAQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:in-reply-to :content-disposition:mime-version:references:message-id:subject:cc :to:from:date; bh=WHEu/yCxJNejCZgRfP44TLNR3GvnwN/6q+zSDcBf6QE=; b=kqyUw/qWs/zBX/Z71g2NFX8dUvw0U4sR/r1s90SdU9PRLCuTdIGCB0lJsvLLpCkKv/ Hct64+6IkwoNJE46LP32ByFh5yC3IdhRUoSe4D5CIwmJ/9bO+60F+cJtIUph8dDwUZSe RAMC724e9j0Ly3jfmKRuDtxdqmrBMap0GSnQFKjki4PsCrGKqsl/iOzollK9FKykTZXv EsV3txbPUa/qzAjb6i4g7b7VBmAbTj3cPztVmMOQ1i8FWeYW7etuQxzjfPAkJ4x9D/vc xcxa80BBUwrI94ybO0h0rCbI2m7OwOwOdOwCBZN22DVIBB1AF0Z6+05qp1MZzNkv8w+T h90A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id k1-v6si347898pgo.0.2018.09.12.01.43.21; Wed, 12 Sep 2018 01:43:36 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727841AbeILNqd (ORCPT + 99 others); Wed, 12 Sep 2018 09:46:33 -0400 Received: from mail.bootlin.com ([62.4.15.54]:45465 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726901AbeILNqd (ORCPT ); Wed, 12 Sep 2018 09:46:33 -0400 Received: by mail.bootlin.com (Postfix, from userid 110) id B32CC207B3; Wed, 12 Sep 2018 10:43:00 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.bootlin.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (AAubervilliers-681-1-30-219.w90-88.abo.wanadoo.fr [90.88.15.219]) by mail.bootlin.com (Postfix) with ESMTPSA id 304B3203DC; Wed, 12 Sep 2018 10:42:43 +0200 (CEST) Date: Wed, 12 Sep 2018 10:42:42 +0200 From: Maxime Ripard To: Kishon Vijay Abraham I Cc: Boris Brezillon , Thomas Petazzoni , Laurent Pinchart , linux-media@vger.kernel.org, Archit Taneja , Andrzej Hajda , Chen-Yu Tsai , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, Krzysztof Witos , Rafal Ciepiela Subject: Re: [PATCH 02/10] phy: Add configuration interface Message-ID: <20180912084242.skxbwbgluakakyg6@flea> References: <1ed01c1f-76d5-fa96-572b-9bfd269ad11b@ti.com> <20180906145622.kwxvkcuerbeqsj6b@flea> <1a169fad-72b7-fac0-1254-cac5d8304740@ti.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="75jzlrr25g64gdfy" Content-Disposition: inline In-Reply-To: <1a169fad-72b7-fac0-1254-cac5d8304740@ti.com> User-Agent: NeoMutt/20180716 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --75jzlrr25g64gdfy Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Hi! On Wed, Sep 12, 2018 at 01:12:31PM +0530, Kishon Vijay Abraham I wrote: > On Thursday 06 September 2018 08:26 PM, Maxime Ripard wrote: > > Hi Kishon, > >=20 > > On Thu, Sep 06, 2018 at 02:57:58PM +0530, Kishon Vijay Abraham I wrote: > >> On Wednesday 05 September 2018 02:46 PM, Maxime Ripard wrote: > >>> The phy framework is only allowing to configure the power state of th= e PHY > >>> using the init and power_on hooks, and their power_off and exit > >>> counterparts. > >>> > >>> While it works for most, simple, PHYs supported so far, some more adv= anced > >>> PHYs need some configuration depending on runtime parameters. These P= HYs > >>> have been supported by a number of means already, often by using ad-h= oc > >>> drivers in their consumer drivers. > >>> > >>> That doesn't work too well however, when a consumer device needs to d= eal > >>> multiple PHYs, or when multiple consumers need to deal with the same = PHY (a > >>> DSI driver and a CSI driver for example). > >>> > >>> So we'll add a new interface, through two funtions, phy_validate and > >>> phy_configure. The first one will allow to check that a current > >>> configuration, for a given mode, is applicable. It will also allow th= e PHY > >>> driver to tune the settings given as parameters as it sees fit. > >>> > >>> phy_configure will actually apply that configuration in the phy itsel= f. > >>> > >>> Signed-off-by: Maxime Ripard > >>> --- > >>> drivers/phy/phy-core.c | 62 +++++++++++++++++++++++++++++++++++++++= +++- > >>> include/linux/phy/phy.h | 42 ++++++++++++++++++++++++++++- > >>> 2 files changed, 104 insertions(+) > >>> > >>> diff --git a/drivers/phy/phy-core.c b/drivers/phy/phy-core.c > >>> index 35fd38c5a4a1..6eaf655e370f 100644 > >>> --- a/drivers/phy/phy-core.c > >>> +++ b/drivers/phy/phy-core.c > >>> @@ -408,6 +408,68 @@ int phy_calibrate(struct phy *phy) > >>> EXPORT_SYMBOL_GPL(phy_calibrate); > >>> =20 > >>> /** > >>> + * phy_configure() - Changes the phy parameters > >>> + * @phy: the phy returned by phy_get() > >>> + * @mode: phy_mode the configuration is applicable to. > >> > >> mode should be used if the same PHY can be configured in multiple mode= s. But > >> with phy_set_mode() and phy_calibrate() we could achieve the same. > >=20 > > So you would change the prototype to have a configuration applying > > only to the current mode set previously through set_mode? >=20 > yeah. > With phy_configure, if the PHY is not in @mode, it should return an error= ? Or > will it set the PHY to @mode and apply the configuration in @opts? I wanted to have it return an error either if it was configured in another mode or if the mode was unsupported yes. > > Can we have PHY that operate in multiple modes at the same time? >=20 > Not at the same time. But the same PHY can operate in multiple modes (For > example we have PHYs that can be used either with PCIe or USB3) Ok, that makes sense. I guess we could rely on phy_set_mode then if you prefer. > >>> + * @opts: New configuration to apply > >> > >> Should these configuration come from the consumer driver? > >=20 > > Yes >=20 > How does the consumer driver get these configurations? Is it from user sp= ace or > dt associated with consumer device. It really depends on multiple factors (and I guess on what mode the PHY is actually supposed to support), but in the case covered by this serie, the info mostly come from multiple places: - The resolutions supported by the panel - The resolutions supported by the phy consumer (and its integration, for things like the clock rates it can output) - The resolutions and timings supported by the phy itself (once again, the integration is mostly involved here since it really only depends on which clock rates can be achieved) - The timings boundaries that the specification has - The resolution selected by the user So we'd have that information coming from multiple places: the userspace would select the resolution, drivers would be able to filter out unsupported resolutions, and the DT will provide the integration details to help them do so. But I guess from an API standpoint, it really is expected to be assembled by the phy consumer driver. > >>> +/** > >>> + * phy_validate() - Checks the phy parameters > >>> + * @phy: the phy returned by phy_get() > >>> + * @mode: phy_mode the configuration is applicable to. > >>> + * @opts: Configuration to check > >>> + * > >>> + * Used to check that the current set of parameters can be handled by > >>> + * the phy. Implementations are free to tune the parameters passed as > >>> + * arguments if needed by some implementation detail or > >>> + * constraints. It will not change any actual configuration of the > >>> + * PHY, so calling it as many times as deemed fit will have no side > >>> + * effect. > >>> + * > >>> + * Returns: 0 if successful, an negative error code otherwise > >>> + */ > >>> +int phy_validate(struct phy *phy, enum phy_mode mode, > >>> + union phy_configure_opts *opts) > >> > >> IIUC the consumer driver will pass configuration options (or PHY param= eters) > >> which will be validated by the PHY driver and in some cases the PHY dr= iver can > >> modify the configuration options? And these modified configuration opt= ions will > >> again be given to phy_configure? > >> > >> Looks like it's a round about way of doing the same thing. > >=20 > > Not really. The validate callback allows to check whether a particular > > configuration would work, and try to negotiate a set of configurations > > that both the consumer and the PHY could work with. >=20 > Maybe the PHY should provide the list of supported features to the consum= er > driver and the consumer should select a supported feature? It's not really about the features it supports, but the boundaries it might have on those features. For example, the same phy integrated in two different SoCs will probably have some limit on the clock rate it can output because of the phy design itself, but also because of the clock that is fed into that phy, and that will be different from one SoC to the other. This integration will prevent us to use some clock rates on the first SoC, while the second one would be totally fine with it. Obviously, the consumer driver shouldn't care about the phy integration details, especially since some of those consumer drivers need to interact with multiple phy designs (or the same phy design can be used by multiple consumers). So knowing that a feature is supported is really not enough. With MIPI-DPHY at least, the API is generic enough so that another mode where the features would make sense could implement a feature flag if that makes sense. > > For example, DRM requires this to filter out display modes (ie, > > resolutions) that wouldn't be achievable by the PHY so that it's never >=20 > Can't the consumer driver just tell the required resolution to the PHY an= d PHY > figuring out all the parameters for the resolution or an error if that > resolution cannot be supported? Not really either. With MIPI D-PHY, the phy is fed a clock that is generated by the phy consumer, which might or might not be an exact fit for the resolution. There's so many resolutions that in most case, the clock factors don't allow you to have a perfect match. And obviously, this imprecision should be taken into account by the PHY as well. And then, there's also the matter than due to design constraints, some consumers would have fixed timings that are not at the spec default value, but still within the acceptable range. We need to communicate that to the PHY. Maxime --=20 Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com --75jzlrr25g64gdfy Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE0VqZU19dR2zEVaqr0rTAlCFNr3QFAluY0YEACgkQ0rTAlCFN r3SzBA//ei3mPaT1Kmv1XdB/Am2Eb1+iOqeH+YlVD7rplb7GC6r2pDHYQvvrZHjN b9qgaIDaox6d+N7NzqLzOqJf+OCx+RyoPvDptj8qgW5OGGIchXjrV/d8k9wekEV0 uKmuNp14ujwhDGcqwWKk+EwLn5F0+rXw+8P6irACTT9nvlNyKR0d26qprPMvuNqA nmL6JfdyN/6jKZidcYLF8VrgfXkTJ0/YKdiuZ7uflNL2uu2dzWOBOYIrWsRUsfYi bSuRfbAHHwIJweomaWqh/zEpxAnhc3sRDDgKHZol6d2BW1B2EOyhpK3YGlMa4TQf 1Fya0ulK4sVaQ7BejVqoNYw10wzwecmCREhZD75yiYwraXrjh3+Q3POC0NCkVAr3 1IyeGjG0kKl4bnc4sA9GdiAgpbvgEaPIwOvvjUuAIzEG7UzROv7II2YxWdt17GDw eJrScm8TC9Tz86Bk2e6ZdxXk4T5yBMMZX4LHz+Xrfg3kRXYeM+92ic+3STphi4uI pZGrQPbevMF/W6tdtG0uEXGuNG+jnA7KWzRaW3z9BOcFaW4fN0bPwKtsgpK2ru8q FpPsiSwY3NIeEJlnU8AsU95W0cDYvkajpzH0tzAq/P3Jc8Xw47JDqWCQY1RpHrye hSDU9unBaKuSicZ4VLJPg0rMxc1dEPsBks0JahDnw3STOU5XQzk= =Kduc -----END PGP SIGNATURE----- --75jzlrr25g64gdfy--