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[209.132.180.67]) by mx.google.com with ESMTP id l6-v6si578702pfc.298.2018.09.12.03.48.03; Wed, 12 Sep 2018 03:48:18 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=LTFarwEM; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727709AbeILPvu (ORCPT + 99 others); Wed, 12 Sep 2018 11:51:50 -0400 Received: from mail-wm0-f67.google.com ([74.125.82.67]:36142 "EHLO mail-wm0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727047AbeILPvu (ORCPT ); Wed, 12 Sep 2018 11:51:50 -0400 Received: by mail-wm0-f67.google.com with SMTP id j192-v6so1862741wmj.1 for ; Wed, 12 Sep 2018 03:47:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=au41o3cuO0JIan5SCTDOKR4LvErEfj3yWHL3s69UTi4=; b=LTFarwEMGTiE8R0Ed9CLdxw4LJBKW0Q5gH3zhJAcNLXl9CFtxRk+AYsyIORSKp4P2Y kPsc1L0fvB3Hr7uY7At7wEAbb4e2wVI71RuSeiosfDUEWEIKsr2jd6YThrS+DjRNuoRn k6euxgZo8jJtxgWKugLluMjXIkb6mMiYcNpTU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=au41o3cuO0JIan5SCTDOKR4LvErEfj3yWHL3s69UTi4=; b=TGHmnh1ZxK0oKOKja6HeYwtDovDgDlMYtCGkwhRhiHviEzOWIvNgeUuiAU0LSqckfB sWoz9uV2MDlBds5J6Fz8kQZACbCqQiaE2tKnLzNKlDjcxFY7NlD0WUjXITbczV3jSa8H UFBppkBbihaip1tkn3OJ8lXp8DUaWJtu0waJVkBaWaWpnJhySmx7XOyV+gYgWQHXqSJ4 USnyB9Qf6dNgKx4VZnO0PJKFRY0WahdkEN9Q6xD41dRU/rVHNmQ5LtLnpBiv2hLpQkwO DIiKZwbfj6kaJj6G0pPx4rW5m2l8eyRwWSJRfQT2mU/gYL0cpayTh+xnGfDsFSa+oOF6 WqTw== X-Gm-Message-State: APzg51BN4ScEqPj0Uu6IA4TK1SWl+soUNAEP/NDRHd3+eJP+3pbzDWvz QtpkYcnA2qNn1b2H1VhWg2WScQ== X-Received: by 2002:a1c:28c2:: with SMTP id o185-v6mr1271215wmo.40.1536749269374; Wed, 12 Sep 2018 03:47:49 -0700 (PDT) Received: from leoy-ThinkPad-X240s ([45.76.138.171]) by smtp.gmail.com with ESMTPSA id a37-v6sm1346840wrc.21.2018.09.12.03.47.44 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 12 Sep 2018 03:47:48 -0700 (PDT) Date: Wed, 12 Sep 2018 18:47:35 +0800 From: leo.yan@linaro.org To: Suzuki K Poulose Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, robh@kernel.org, frowand.list@gmail.com, devicetree@vger.kernel.org, mathieu.poirier@linaro.org, arm@kernel.org, sudeep.holla@arm.com, xuwei5@hisilicon.com, lipengcheng8@huawei.com Subject: Re: [PATCH 02/11] dts: hisilicon: Update coresight bindings for hardware ports Message-ID: <20180912104735.GC3353@leoy-ThinkPad-X240s> References: <1536661032-30481-1-git-send-email-suzuki.poulose@arm.com> <1536661032-30481-3-git-send-email-suzuki.poulose@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1536661032-30481-3-git-send-email-suzuki.poulose@arm.com> User-Agent: Mutt/1.10+31 (9cdd884) (2018-06-19) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Sep 11, 2018 at 11:17:03AM +0100, Suzuki K Poulose wrote: > Switch to updated coresight bindings for hw ports. As Shawn suggested, please change subject as "arm64: dts: hi6220: ...." > Cc: xuwei5@hisilicon.com > Cc: lipengcheng8@huawei.com > Cc: Mathieu Poirier > Signed-off-by: Suzuki K Poulose > --- > .../arm64/boot/dts/hisilicon/hi6220-coresight.dtsi | 147 ++++++++++++--------- > 1 file changed, 85 insertions(+), 62 deletions(-) > > diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi > index 7afee5d..2202816 100644 > --- a/arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi > +++ b/arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi [...] > @@ -302,10 +315,12 @@ > > cpu = <&cpu3>; > > - port { > - etm3_out: endpoint { > - remote-endpoint = > - <&acpu_funnel_in3>; > + out-ports { > + port { > + etm3_out: endpoint { > + remote-endpoint = > + <&acpu_funnel_in3>; > + }; > }; > }; > }; > @@ -319,10 +334,12 @@ > > cpu = <&cpu4>; > > - port { > + out-ports { > + port { > etm4_out: endpoint { Indent? After applied this patch and tested on Hikey board; FWIW: Tested-by: Leo Yan > - remote-endpoint = > - <&acpu_funnel_in4>; > + remote-endpoint = > + <&acpu_funnel_in4>; > + }; > }; > }; > }; > @@ -336,10 +353,12 @@ > > cpu = <&cpu5>; > > - port { > - etm5_out: endpoint { > - remote-endpoint = > - <&acpu_funnel_in5>; > + out-ports { > + port { > + etm5_out: endpoint { > + remote-endpoint = > + <&acpu_funnel_in5>; > + }; > }; > }; > }; > @@ -353,10 +372,12 @@ > > cpu = <&cpu6>; > > - port { > - etm6_out: endpoint { > - remote-endpoint = > - <&acpu_funnel_in6>; > + out-ports { > + port { > + etm6_out: endpoint { > + remote-endpoint = > + <&acpu_funnel_in6>; > + }; > }; > }; > }; > @@ -370,10 +391,12 @@ > > cpu = <&cpu7>; > > - port { > - etm7_out: endpoint { > - remote-endpoint = > - <&acpu_funnel_in7>; > + out-ports { > + port { > + etm7_out: endpoint { > + remote-endpoint = > + <&acpu_funnel_in7>; > + }; > }; > }; > }; > -- > 2.7.4 >