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[209.132.180.67]) by mx.google.com with ESMTP id 66-v6si841307plb.428.2018.09.12.05.28.35; Wed, 12 Sep 2018 05:28:50 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727770AbeILRcl (ORCPT + 99 others); Wed, 12 Sep 2018 13:32:41 -0400 Received: from foss.arm.com ([217.140.101.70]:58492 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726670AbeILRck (ORCPT ); Wed, 12 Sep 2018 13:32:40 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D0B9F7A9; Wed, 12 Sep 2018 05:28:22 -0700 (PDT) Received: from [10.4.12.81] (melchizedek.emea.arm.com [10.4.12.81]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id DF75A3F703; Wed, 12 Sep 2018 05:28:20 -0700 (PDT) Subject: Re: [PATCH v5 05/27] arm64: Use daifflag_restore after bp_hardening To: Julien Thierry Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, daniel.thompson@linaro.org, joel@joelfernandes.org, marc.zyngier@arm.com, mark.rutland@arm.com, christoffer.dall@arm.com, catalin.marinas@arm.com, will.deacon@arm.com References: <1535471497-38854-1-git-send-email-julien.thierry@arm.com> <1535471497-38854-6-git-send-email-julien.thierry@arm.com> <641119b9-3466-817d-3d6b-dd710c646b49@arm.com> <8f200315-1db9-1905-71ae-cb4269450b7c@arm.com> From: James Morse Message-ID: <71bb5289-b381-65da-c609-fa4a08640425@arm.com> Date: Wed, 12 Sep 2018 13:28:19 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 MIME-Version: 1.0 In-Reply-To: <8f200315-1db9-1905-71ae-cb4269450b7c@arm.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Julien, On 12/09/18 12:11, Julien Thierry wrote: > On 12/09/18 11:32, James Morse wrote: >> On 28/08/18 16:51, Julien Thierry wrote: >>> For EL0 entries requiring bp_hardening, daif status is kept at >>> DAIF_PROCCTX_NOIRQ until after hardening has been done. Then interrupts >>> are enabled through local_irq_enable(). >>> >>> Before using local_irq_* functions, daifflags should be properly restored >>> to a state where IRQs are enabled. >> >>> Enable IRQs by restoring DAIF_PROCCTX state after bp hardening. >> >> Is this just for symmetry, or are you going on to add something to the daifflags >> state that local_irq_* functions won't change? (if so, could you allude to that >> in the commit message) > What happens is that once we use ICC_PMR_EL1, local_irq_enable will not touch > PSR.I. And we are coming back from an entry where PSR.I was kept to 1 so > local_irq_enable was not actually enabling the interrupts. On the otherhand, > restore will affect both. Got it. Thanks! Does this mean stop_machine()s local_save_flags()/local_irq_restore() will not be symmetric around __apply_alternatives_multi_stop()? I see you add alternatives in these in patch 15, but I haven't got that far yet) > Another option is to have the asm macro "enable_da_f" also switch to PMR usage > (i.e. "just keep normal interrupts disabled"). Overall it would probably be > easier to reason with, but I'm just unsure whether it is acceptable to receive a > Pseudo NMI before having applied the bp_hardening. Wouldn't this give the interrupt controller a headache? I assume IRQs really are masked when handle_arch_irq is called. (I know nothing about the gic) Thanks, James