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[209.132.180.67]) by mx.google.com with ESMTP id j10-v6si828020plk.406.2018.09.12.05.42.20; Wed, 12 Sep 2018 05:42:36 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727560AbeILRqd (ORCPT + 99 others); Wed, 12 Sep 2018 13:46:33 -0400 Received: from foss.arm.com ([217.140.101.70]:58816 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726672AbeILRqd (ORCPT ); Wed, 12 Sep 2018 13:46:33 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 57FED80D; Wed, 12 Sep 2018 05:42:12 -0700 (PDT) Received: from [10.4.13.23] (en101.Emea.Arm.com [10.4.13.23]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 8C1353F703; Wed, 12 Sep 2018 05:42:10 -0700 (PDT) Subject: Re: [PATCH 02/11] dts: hisilicon: Update coresight bindings for hardware ports To: leo.yan@linaro.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, robh@kernel.org, frowand.list@gmail.com, devicetree@vger.kernel.org, mathieu.poirier@linaro.org, arm@kernel.org, sudeep.holla@arm.com, xuwei5@hisilicon.com, lipengcheng8@huawei.com References: <1536661032-30481-1-git-send-email-suzuki.poulose@arm.com> <1536661032-30481-3-git-send-email-suzuki.poulose@arm.com> <20180912104735.GC3353@leoy-ThinkPad-X240s> From: Suzuki K Poulose Message-ID: <22fd3ec6-bde0-87c6-673b-f95a15190bda@arm.com> Date: Wed, 12 Sep 2018 13:42:09 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 MIME-Version: 1.0 In-Reply-To: <20180912104735.GC3353@leoy-ThinkPad-X240s> Content-Type: text/plain; charset=us-ascii; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Leo, On 12/09/18 11:47, leo.yan@linaro.org wrote: > On Tue, Sep 11, 2018 at 11:17:03AM +0100, Suzuki K Poulose wrote: >> Switch to updated coresight bindings for hw ports. > > As Shawn suggested, please change subject as "arm64: dts: hi6220: > ...." > Sure, will do. >> Cc: xuwei5@hisilicon.com >> Cc: lipengcheng8@huawei.com >> Cc: Mathieu Poirier >> Signed-off-by: Suzuki K Poulose >> --- >> .../arm64/boot/dts/hisilicon/hi6220-coresight.dtsi | 147 ++++++++++++--------- >> 1 file changed, 85 insertions(+), 62 deletions(-) >> >> diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi >> index 7afee5d..2202816 100644 >> --- a/arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi >> +++ b/arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi > > [...] > >> @@ -302,10 +315,12 @@ >> >> cpu = <&cpu3>; >> >> - port { >> - etm3_out: endpoint { >> - remote-endpoint = >> - <&acpu_funnel_in3>; >> + out-ports { >> + port { >> + etm3_out: endpoint { >> + remote-endpoint = >> + <&acpu_funnel_in3>; >> + }; >> }; >> }; >> }; >> @@ -319,10 +334,12 @@ >> >> cpu = <&cpu4>; >> >> - port { >> + out-ports { >> + port { >> etm4_out: endpoint { > > Indent? Yes, I have fixed this locally for v2. > > After applied this patch and tested on Hikey board; FWIW: > > Tested-by: Leo Yan Thanks for the testing ! Cheers Suzuki