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[209.132.180.67]) by mx.google.com with ESMTP id k189-v6si1188810pgc.321.2018.09.12.08.33.10; Wed, 12 Sep 2018 08:33:32 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726913AbeILUht (ORCPT + 99 others); Wed, 12 Sep 2018 16:37:49 -0400 Received: from foss.arm.com ([217.140.101.70]:33844 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726642AbeILUht (ORCPT ); Wed, 12 Sep 2018 16:37:49 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 31FD57A9; Wed, 12 Sep 2018 08:32:47 -0700 (PDT) Received: from [10.4.12.116] (e107155-lin.emea.arm.com [10.4.12.116]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id F229A3F5C0; Wed, 12 Sep 2018 08:32:45 -0700 (PDT) Cc: Sudeep Holla , linux-kernel@vger.kernel.org, vkilari@codeaurora.org Subject: Re: [PATCH] ACPI/PPTT: Handle architecturally unknown cache types To: Jeffrey Hugo , Jeremy Linton , rjw@rjwysocki.net, linux-acpi@vger.kernel.org References: <1536694334-5811-1-git-send-email-jhugo@codeaurora.org> <337ef641-e645-137a-3d7f-d457264d94d5@codeaurora.org> From: Sudeep Holla Organization: ARM Message-ID: <4b9965d2-efe5-6829-5e72-99b936711163@arm.com> Date: Wed, 12 Sep 2018 16:32:44 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 MIME-Version: 1.0 In-Reply-To: <337ef641-e645-137a-3d7f-d457264d94d5@codeaurora.org> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 12/09/18 15:48, Jeffrey Hugo wrote: > On 9/12/2018 4:49 AM, Sudeep Holla wrote: >> >> >> On 11/09/18 21:38, Jeffrey Hugo wrote: >>> On 9/11/2018 2:16 PM, Jeremy Linton wrote: >>>> Hi Jeffrey, >>>> >>>> (+Sudeep) >>>> >> >> [..] >> >>>> >>>> If you look at the next line of code following this comment its going >>>> to update the cache type for fully populated PPTT nodes. Although with >>>> the suggested change its only going to activate if someone completely >>>> fills out the node and fails to set the valid flag on the cache type. >>> >>> Yes, however that case doesn't apply to the scenario we are concerned >>> about, doesn't seem to be fully following the PPTT spec, and seems odd >>> that Linux just assumes that a "fully specified" cache is unified. >>> >> >> Agreed, but adding code that will never get used is also not so good. >> Do you have systems where this is needed ? > > Yes. > Not exactly IMO. I was referring to architecturally not specified separate data/inst cache. >> >>>> What I suspect is happening in the reported case is that the nodes in >>>> the PPTT table are missing fields we consider to be important. Since >>>> that data isn't being filled out anywhere else, so we leave the cache >>>> type alone too. This has the effect of hiding sysfs nodes with >>>> incomplete information. >>>> >>>> Also, the lack of the DATA/INST fields is based on the assumption that >>>> the only nodes which need their type field updated are outside of the >>>> CPU core itself so they are pretty much guaranteed to be UNIFIED. Are >>>> you hitting this case? >>>> >>> >>> Yes.  Without this change, we hit the lscpu error in the commit message, >>> and get zero output about the system.  We don't even get information >>> about the caches which are architecturally specified or how many cpus >>> are present.  With this change, we get what we expect out of lscpu (and >>> also lstopo) including the cache(s) which are not architecturally >>> specified. >>> >> >> lscpu and lstopo are so broken. They just assume everything on CPU0. >> If you hotplug them out, you start seeing issues. So reading and file >> that doesn't exist and then bail out on other essential info though they >> are present, hmmm ... > > lscpu/lstopo being broken seems orthogonal to me. Agreed. > The kernel is not providing the type file because the kernel thinks the > type is NOCACHE, despite PPTT providing a type.  In an ideal world, I > think the kernel should be fixed (this change), and any deficiencies or > bad assumptions in lscpu/lstopo should also be fixed. > Again agreed as mentioned in the other mail. I just didn't like the attribution of that issue to this kernel bug. >> >>> I guess I still don't understand why its important for PPTT to list, for >>> example, the sets/ways of a cache in all scenarios.  In the case of a >>> "transparent" cache (implementation defined as not reported per section >>> D3.4.2 of the ARM ARM where the cache cannot be managed by SW), there >>> may not be valid values for sets/ways.  I would argue its better to not >>> report that information, rather than provide bogus information just to >>> make Linux happy, which may break other OSes and provide means for which >>> a user to hang themselves. >>> >> >> While I agree presenting wrong info is not good, but one of the reasons >> the cache info is present is to provide those info for some applications >> to do optimization based on that(I am told so and not sure if just type >> and size will be good enough) and you seem to agree with that below. > > Yes, but if its not entirely clear, on my system, we have the > information but its not being presented.  This change fixes that.  I'm > willing to discuss an alternative fix, but to ignore the issue is not > viable in my opinion. > Agreed. > What do we need to move forward here? > Will the simple change I posted address the issue ? I don't want to give an illusion that separate data/inst cache is support for architecturally not specified caches. If it needs to be supported, then it needs to be fixed correctly everywhere not just here. -- Regards, Sudeep