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[209.132.180.67]) by mx.google.com with ESMTP id e14-v6si2698243pgj.413.2018.09.12.17.41.27; Wed, 12 Sep 2018 17:41:47 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@lechnology.com header.s=default header.b=F+8Hlfch; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726768AbeIMFrA (ORCPT + 99 others); Thu, 13 Sep 2018 01:47:00 -0400 Received: from vern.gendns.com ([206.190.152.46]:46143 "EHLO vern.gendns.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726382AbeIMFrA (ORCPT ); Thu, 13 Sep 2018 01:47:00 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lechnology.com; s=default; h=Message-Id:Date:Subject:Cc:To:From:Sender: Reply-To:MIME-Version:Content-Type:Content-Transfer-Encoding:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:In-Reply-To:References:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=JZIgClga4XUpBDzlTDNQz8tLfQ5tZB2IY2+IZLtdcew=; b=F+8HlfchBwjBkaOMxzJ6juc49E o04//j7LWMvsbWJy/VTVkG7zjdBQt99sGsB/D11f5vOUqcUnfBDFEqpU3b+WLr90RQC2Zo5zpP7ZC y0+k8UsLwB+8I0HOwEFTnMaLK7Fjk1xJoUgpk6iwPkYJxWac6DlcPOhWy3vpnR1JPvLK8F0We9Lw0 +4n1nxBtmJL6MLSo05mV7KsetEbiqOzwvj+1sXrqz+GWtbt+L1FYxY3SSFfxkjG06YbcU4kuYlScc KCIr+RoLGiXeEa+5AUJ8I/wHKqgbo9N3bNTdy3GApWpBlJskws5liCzS+DABfG/ikDP5ZXuPpYEYX kyJAmunQ==; Received: from 108-198-5-147.lightspeed.okcbok.sbcglobal.net ([108.198.5.147]:33924 helo=freyr.lechnology.com) by vern.gendns.com with esmtpsa (TLSv1.2:ECDHE-RSA-AES128-GCM-SHA256:128) (Exim 4.91) (envelope-from ) id 1g0Ffo-00AGoe-Bk; Wed, 12 Sep 2018 20:39:56 -0400 From: David Lechner To: linux-spi@vger.kernel.org, linux-iio@vger.kernel.org Cc: David Lechner , Jonathan Cameron , Hartmut Knaack , Lars-Peter Clausen , Peter Meerwald-Stadler , Mark Brown , linux-kernel@vger.kernel.org Subject: [PATCH v2 0/4] spi: introduce SPI_CS_WORD mode flag Date: Wed, 12 Sep 2018 19:39:16 -0500 Message-Id: <20180913003920.30600-1-david@lechnology.com> X-Mailer: git-send-email 2.17.1 X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - vern.gendns.com X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - lechnology.com X-Get-Message-Sender-Via: vern.gendns.com: authenticated_id: davidmain+lechnology.com/only user confirmed/virtual account not confirmed X-Authenticated-Sender: vern.gendns.com: davidmain@lechnology.com X-Source: X-Source-Args: X-Source-Dir: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This series introduces a new SPI mode flag, SPI_CS_WORD, that indicates that the chip select line should be toggled after each word sent. This series includes examples of how this can be implemented for both an SPI controller and an SPI device. The motivation here is to take advantage of DMA transfers with an analog/digital convert chip. This chip requires that the chip select line be toggled after each word send in order to drive the internal circuitry of the chip. The way we were accomplishing this was, for example, to read 16 channels, we would create 16 SPI _transfer_s in one SPI _message_. Although this works, it uses quite a bit of CPU because we have to do work at the end of each transfer to get the next transfer ready. When you are polling the chip at 100Hz, this CPU usage adds up. The SPI controller being used has DMA support, but only on the _transfer_ level and not on the _message_ level. So, to take advantage of DMA, we need to read all of the A/DC channels in a single _transfer_. The SPI controller is capable automatically toggling the chip select line during a DMA transfer, so we are adding a new SPI flag in order to take advantage of this. I have tested both the default software implementation and the spi-davinci implementation with the A/DC driver in this series. v2 changes: - dropped patch "spi: spi-bitbang: change flags from u8 to u16" that has already been applied - new patch "spi: add software implementation for SPI_CS_WORD" that provides a default implementation of SPI_CS_WORD for controllers David Lechner (4): spi: add new SPI_CS_WORD flag spi: add software implementation for SPI_CS_WORD iio: adc: ti-ads7950: use SPI_CS_WORD to reduce CPU usage spi: spi-davinci: Add support for SPI_CS_WORD drivers/iio/adc/ti-ads7950.c | 53 +++++++++++++++++++++--------------- drivers/spi/spi-davinci.c | 11 ++++++-- drivers/spi/spi.c | 32 +++++++++++++++++++++- include/linux/spi/spi.h | 2 +- 4 files changed, 71 insertions(+), 27 deletions(-) -- 2.17.1