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[209.132.180.67]) by mx.google.com with ESMTP id e12-v6si2749792pls.372.2018.09.12.20.39.48; Wed, 12 Sep 2018 20:40:03 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@brainfault-org.20150623.gappssmtp.com header.s=20150623 header.b=TU8g4LYc; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727730AbeIMIrI (ORCPT + 99 others); Thu, 13 Sep 2018 04:47:08 -0400 Received: from mail-wr1-f67.google.com ([209.85.221.67]:45636 "EHLO mail-wr1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726693AbeIMIrI (ORCPT ); Thu, 13 Sep 2018 04:47:08 -0400 Received: by mail-wr1-f67.google.com with SMTP id 20-v6so4032024wrb.12 for ; Wed, 12 Sep 2018 20:39:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=brainfault-org.20150623.gappssmtp.com; s=20150623; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=OCkuYAvKkOjNGctc1hjDg1xcv9RCzj1FR/40nidz/Dg=; b=TU8g4LYcoEtcMZVTBPqpFNCRNTegRvNxwWx84IfKRuJnYHI5MqMzPMSV08q7sniC8x jKQZBuIiz2iBwdxtE/yIfvVwWBgWazr4nKHLHszPGQqUDge9OLQO5j/VwicadeA5YwJZ t3OWkEty5nLqoKKt7f1QEcXwvj/TNtpTcXZScfQhu0ZjpVdj/FtHgfzD9MpLt8zocNI0 IBgTrYPB6fwNOvTXnqwZhOLobiRdcffSrYxQZJG3mSEVfSRHMjSlWV7/N5AOyCt0rFor 5CnVEAlnom7C3zhOOf7yOGnXy6CKvVdIZR549M2x9M5b8cqc5MWThbDFTNHwi6aG0Ddm pDUA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=OCkuYAvKkOjNGctc1hjDg1xcv9RCzj1FR/40nidz/Dg=; b=opVPtryfH8N9cKh9sj8i2Pl5GiWxmbgKsdnQ8lWwx83oR/3FVl4ZcqI31pYC6tbe26 sjdwXkMumjpRhow0sbC/Wap8QBwAcsrUELVcotmCgxTSJy6HFKSh9sS1QaC+U4lRAX0X XtyKa5aUVy2Nftqkp4uaTptpdQVTOX5FDfo4D2OTRXWQEjqGYR+7+H54v4DDZoK4yJyt I+3rQJ3VNRp+TyLn/o1z04MOI8hccq1irb1j2u4FRL7KuBNcMUX6nmyRUCFj5mnmjLWe eZSrRamtSLrdFIAN0kAE4blEDKFFWjjZ6jbF0wKiHsRaJwJ/TFMBe1Wcj0wR6CHJl9qc sL+A== X-Gm-Message-State: APzg51AyGQV1RKzvpJ6KOIbA/bK5AWXDMt+Mv9K6YPV0YqYIzeJDR0cJ 5xwbGIpAdmplRo5dZi+zgiMuRORz9syGBG7KDuvVBA== X-Received: by 2002:a5d:6b8d:: with SMTP id n13-v6mr3782971wrx.149.1536809972745; Wed, 12 Sep 2018 20:39:32 -0700 (PDT) MIME-Version: 1.0 References: <20180912143822.21948-1-anup@brainfault.org> <72961c71-c4e4-7990-da64-a7f1613f2e1c@wdc.com> In-Reply-To: <72961c71-c4e4-7990-da64-a7f1613f2e1c@wdc.com> From: Anup Patel Date: Thu, 13 Sep 2018 09:09:21 +0530 Message-ID: Subject: Re: [PATCH] RISC-V: Show CPU ID and Hart ID separately in /proc/cpuinfo To: Atish Patra Cc: Palmer Dabbelt , Albert Ou , Christoph Hellwig , linux-riscv@lists.infradead.org, "linux-kernel@vger.kernel.org List" Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Sep 12, 2018 at 10:17 PM Atish Patra wrote: > > On 9/12/18 7:38 AM, Anup Patel wrote: > > Currently, /proc/cpuinfo show logical CPU ID as Hart ID which > > is in-correct. This patch shows CPU ID and Hart ID separately > > in /proc/cpuinfo using cpuid_to_hardid_map(). > > > > With this patch, contents of /proc/cpuinfo looks as follows: > > cpu : 0 > > hart : 1 > > isa : rv64imafdcsu > > mmu : sv48 > > > > cpu : 1 > > hart : 0 > > isa : rv64imafdcsu > > mmu : sv48 > > > > cpu : 2 > > hart : 3 > > isa : rv64imafdcsu > > mmu : sv48 > > > > cpu : 3 > > hart : 2 > > isa : rv64imafdcsu > > mmu : sv48 > > > > Signed-off-by: Anup Patel > > --- > > arch/riscv/kernel/cpu.c | 3 ++- > > 1 file changed, 2 insertions(+), 1 deletion(-) > > > > diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c > > index f0f0ec2737b7..7c1342e242e6 100644 > > --- a/arch/riscv/kernel/cpu.c > > +++ b/arch/riscv/kernel/cpu.c > > @@ -87,7 +87,8 @@ static int c_show(struct seq_file *m, void *v) > > NULL); > > const char *compat, *isa, *mmu; > > > > - seq_printf(m, "hart\t: %lu\n", cpu_id); > > + seq_printf(m, "cpu\t: %lu\n", cpu_id); > > + seq_printf(m, "hart\t: %lu\n", cpuid_to_hardid_map(cpu_id)); > > if (!of_property_read_string(node, "riscv,isa", &isa) > > && isa[0] == 'r' > > && isa[1] == 'v') > > > > The extra hart information will not be parsed by lscpu which will make > the cpu information inconsistent between lscpu & /proc/cpuinfo. > > Should we patch lscpu as well to show correct hart id as well ? Yes, we should certainly patch lscpu to parse CPU ID and HART ID differently. Regards, Anup