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[209.132.180.67]) by mx.google.com with ESMTP id 43-v6si3649242plc.496.2018.09.13.02.39.33; Thu, 13 Sep 2018 02:39:47 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728146AbeIMOry (ORCPT + 99 others); Thu, 13 Sep 2018 10:47:54 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:44488 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726697AbeIMOrx (ORCPT ); Thu, 13 Sep 2018 10:47:53 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5475480D; Thu, 13 Sep 2018 02:39:13 -0700 (PDT) Received: from [10.4.12.81] (melchizedek.emea.arm.com [10.4.12.81]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C49373F575; Thu, 13 Sep 2018 02:39:11 -0700 (PDT) Subject: Re: [PATCH] ACPI/PPTT: Handle architecturally unknown cache types To: Brice Goglin Cc: Sudeep Holla , Jeffrey Hugo , Jeremy Linton , rjw@rjwysocki.net, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, vkilari@codeaurora.org References: <1536694334-5811-1-git-send-email-jhugo@codeaurora.org> <4f253bf4-ef2d-849f-b793-9b0530e72aab@gmail.com> From: James Morse Message-ID: Date: Thu, 13 Sep 2018 10:39:10 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 MIME-Version: 1.0 In-Reply-To: <4f253bf4-ef2d-849f-b793-9b0530e72aab@gmail.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Brice, On 13/09/18 06:51, Brice Goglin wrote: > Le 12/09/2018 à 11:49, Sudeep Holla a écrit : >>> Yes.  Without this change, we hit the lscpu error in the commit message, >>> and get zero output about the system.  We don't even get information >>> about the caches which are architecturally specified or how many cpus >>> are present.  With this change, we get what we expect out of lscpu (and >>> also lstopo) including the cache(s) which are not architecturally >>> specified. >>> >> lscpu and lstopo are so broken. They just assume everything on CPU0. >> If you hotplug them out, you start seeing issues. So reading and file >> that doesn't exist and then bail out on other essential info though they >> are present, hmmm ... > > Can you elaborate? > > I am not sure cpu0 is supposed to be offlineable on Linux. There's no > "online" file in /sys/devices/system/cpu/cpu0. That's why former lstopo > doesn't like CPU0 being hotplugged out. We are actually making that case > work for another non-standard corner case. But offlining "cpu0" this is > considered "normal", somebody must add that missing "online" sysfs > attribute for "cpu0" (change > https://elixir.bootlin.com/linux/latest/source/drivers/base/cpu.c#L375). On x86 you can't normally offline CPU0, its something to do with certain interrupts always being routed to CPU0, (oh, and hibernate). You should be able to enable this behaviour with 'cpu0_hotplug' on the kernel command line. (Kconfig's CONFIG_BOOTPARAM_HOTPLUG_CPU0 and CONFIG_DEBUG_HOTPLUG_CPU0 are also worth a look) On arm64 at least, cpu0 is just like the others, and can be offlined. Thanks, James > By the way, did anybody actually see an error with lstopo when there's > no "type" attribute for L3? I can't reproduce any issue, we just skip > that specific cache entirely, but everything else appears. If you guys > want to make that "no_cache" cache appear, I'll make it a Unified cache > unless you tell me what to show :)