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Cc:     Sudeep Holla <sudeep.holla@arm.com>,
        Jeffrey Hugo <jhugo@codeaurora.org>,
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Subject: Re: [PATCH] ACPI/PPTT: Handle architecturally unknown cache types
To:     Brice Goglin <brice.goglin@gmail.com>,
        James Morse <james.morse@arm.com>
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From:   Sudeep Holla <sudeep.holla@arm.com>
Organization: ARM
Message-ID: <00cadeff-3a1c-c780-2641-04e47c26181f@arm.com>
Date:   Thu, 13 Sep 2018 16:16:54 +0100
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On 13/09/18 12:53, Brice Goglin wrote:
> Le 13/09/2018 à 11:35, Sudeep Holla a écrit :


>>> On 13/09/18 06:51, Brice Goglin wrote:

[...]

>>>> By the way, did anybody actually see an error with lstopo when there's
>>>> no "type" attribute for L3? I can't reproduce any issue, we just skip
>>>> that specific cache entirely, but everything else appears. If you guys
>>>> want to make that "no_cache" cache appear, I'll make it a Unified cache
>>>> unless you tell me what to show :)
>> IIUC, Jeffrey Hugo did see error as per his initial message:
>> "
>> This fixes the following lscpu issue where only the cache type sysfs file
>> is missing which results in no output providing a poor user experience in
>> the above system configuration.
>> lscpu: cannot open /sys/devices/system/cpu/cpu0/cache/index3/type: No such
>> file or directory
>> "
>>
> 
> I don't know about lscpu (it's a different project), but lstopo
> shouldn't have any such problem.
> 

Ah OK, I have only looked at lscpu source. Sorry for that, I assumed
they are based on same/similar code base. Thanks for letting me know
they are not.

> If you see an issue with lstopo, I'd be interesting in getting the
> tarball generated by hwloc-gather-topology (it dumps useful files from
> procfs and sysfs so that we may debug offline).

Thanks for the information.

-- 
Regards,
Sudeep