Received: by 2002:ac0:a5a6:0:0:0:0:0 with SMTP id m35-v6csp3459148imm; Sun, 16 Sep 2018 19:20:11 -0700 (PDT) X-Google-Smtp-Source: ANB0VdZ3ch2vboOiexBFQVe96J+CNWxxWEdaSvSC/z9fBr2GQ0EK2T/mUXt0V1ZrFds6JwkH+/Z2 X-Received: by 2002:a65:4289:: with SMTP id j9-v6mr21617127pgp.284.1537150811319; Sun, 16 Sep 2018 19:20:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537150811; cv=none; d=google.com; s=arc-20160816; b=NXNLyhInFp7EkiyZ/ZTzYs41oAqTj8dXe7dQP0YTJb59gOdt+FHvwrSW5mO4REwS28 IBwQRUdSMQ/8ZN5PExV0tU4Uibz/mTxgRF4fqPcj8E8IcSxwH7kmdq1zzl4GLEc4Ebm4 l4UN/aOKKPkTWvi3J1rjwV082rAxpMK0Xung1ds1CBX0R7UNVb1cl83pGAgVRIdHiJ7o 7YYmQr16xjRFHaHSR1fSnE3/fEEov3ndJuUfL7qY6vrdonKK3+nLOcMeSOLO0x7A2XK5 EexYqYyxC5hCbn0RANv0amJp7jpHRf2eEAoRzFxbH8ArjyzdTpIv5gXNQZGb5JoYQDod vYLA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=sMH0Q2PLmtyxulpB2BttNomh9+BD828iI4vLg7dyYpQ=; b=zAaDX8tIG0ci/6ccr6F2kJ2M1OkYEMZlmKhEl/t2umi7kqBSRVzGEXribG6hLZXGLa WzwMHgtA1rYx0rufiOW48qclUDl5c8eSbbJGDWMEF4bDVG7W5jGVbg//9iidVyxnZQDk Vb0Wi5JkvSXJUP8MeAOWZ4JVGnzoLhRbN1tpsgKYnhIrDT975YaR1aQ7NYfz8luNrlHv VilHz+Hmr/SUtGSIV2seGW2TCo2LkH9Ig02N8lS6bUmUlzvrPFMSsHNukQn0zo6zdksG Kw4KTUdoMx7XA2NlJMd71XvIJvPCE4L2iIsdTO23hqOgowQOKjD12b8Ew3WdtWiO9jIp 7NAQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 71-v6si15407853pla.92.2018.09.16.19.19.56; Sun, 16 Sep 2018 19:20:11 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727863AbeIQHoy (ORCPT + 99 others); Mon, 17 Sep 2018 03:44:54 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:32181 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726674AbeIQHoy (ORCPT ); Mon, 17 Sep 2018 03:44:54 -0400 X-UUID: 370face7e2f3446493542d0bb34e5843-20180917 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 5341427; Mon, 17 Sep 2018 10:19:35 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs01n1.mediatek.inc (172.21.101.68) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Mon, 17 Sep 2018 10:19:33 +0800 Received: from localhost.localdomain (10.17.3.153) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1210.3 via Frontend Transport; Mon, 17 Sep 2018 10:19:32 +0800 From: Leilk Liu To: Mark Brown CC: Mark Rutland , Matthias Brugger , Sascha Hauer , , , , , , , Leilk Liu Subject: [PATCH v3 3/3] arm64: dts: Add spi slave dts Date: Mon, 17 Sep 2018 10:19:22 +0800 Message-ID: <1537150762-7072-4-git-send-email-leilk.liu@mediatek.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1537150762-7072-1-git-send-email-leilk.liu@mediatek.com> References: <1537150762-7072-1-git-send-email-leilk.liu@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch adds MT2712 spi slave into device tree. Signed-off-by: Leilk Liu --- arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi index 75cc0f7..ee627a7 100644 --- a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi @@ -301,6 +301,17 @@ status = "disabled"; }; + spis1: spi@10013000 { + compatible = "mediatek,mt2712-spi-slave"; + reg = <0 0x10013000 0 0x100>; + interrupts = ; + clocks = <&infracfg CLK_INFRA_AO_SPI1>; + clock-names = "spi"; + assigned-clocks = <&topckgen CLK_TOP_SPISLV_SEL>; + assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL1_D2>; + status = "disabled"; + }; + apmixedsys: syscon@10209000 { compatible = "mediatek,mt2712-apmixedsys", "syscon"; reg = <0 0x10209000 0 0x1000>; -- 1.7.9.5