Received: by 2002:ac0:a5a6:0:0:0:0:0 with SMTP id m35-v6csp3688392imm; Mon, 17 Sep 2018 01:13:57 -0700 (PDT) X-Google-Smtp-Source: ANB0VdbgTk6YNThJj7WcPU+SePFrftu93PrGNerHRW+AtDx6jbHQ4oeh14Uoouc0iSOP1TG0GMsu X-Received: by 2002:a17:902:988a:: with SMTP id s10-v6mr23155371plp.200.1537172037506; Mon, 17 Sep 2018 01:13:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537172037; cv=none; d=google.com; s=arc-20160816; b=deFinknogjphwqBaEdhIvUI8X4MgJVkHFTRwfldriF5r7pPhNNI30dngD5/fKSpFfo adu9jgKCy8sjxCEzZKXQsd12St/Is/Ad+iXmmJ4iGpxtrQUHHeW07DKYq8DpQMeIAws3 bKQ6LCzbsLorvxT3oTz2yvKxdvSK4jBa/aEwwyESt9ffmHfwVuOZG28zqVYSOzXAveXn 4mUC6izjeHaFc3r1Yod/v5RUePjLMo17ZzYxu5zgap2Isr+qfBR439TjwdU0xKrKUNLw QGO5YE+Tbrp7YZpFz8PO5+6NDTUKoqGn76VyoN4GofjCcgAmiE1teHANUUKVQKCIZdUh m7iA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:organization:in-reply-to :content-disposition:mime-version:references:message-id:subject:cc :to:from:date; bh=GP7zW7RR6oZTdb+0ShsJKKNjc4WLd9bzTU5etZjnG7M=; b=yZIQQtfoQmhLWzvLHQJSvJGZuL5QNHAvYlO0XDiKBubvVbUVUMG40qqfUpsbAnOG68 bJJVK6PhRrO/0wfemd8ghd20X7mGvm90ytxZOS4eZ/N9gTD7uqk3mMdArm+aMimsZz6L w9maIj7+7vKo05HXUsV0a9rpKiHbl7wn4+P6+o/FBSVeZXA/EJNX4pNl4hiPh8ukKNRU iLR5yM/RtarhVtcJxu9PFS+iiDxguivQb2gquU6oXqHEx9I3yXu94+KAZfjIMEs26giq +OUrjwdqJiwADBZj6kEzVD1GznXJLf12XYw5ZDavaRXBymMsEi8KNkJUAN5glVRBFMUe k0CA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id n6-v6si14083045plk.255.2018.09.17.01.13.42; Mon, 17 Sep 2018 01:13:57 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728079AbeIQNjW (ORCPT + 99 others); Mon, 17 Sep 2018 09:39:22 -0400 Received: from mga05.intel.com ([192.55.52.43]:21768 "EHLO mga05.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727302AbeIQNjW (ORCPT ); Mon, 17 Sep 2018 09:39:22 -0400 X-Amp-Result: UNKNOWN X-Amp-Original-Verdict: FILE UNKNOWN X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 17 Sep 2018 01:13:04 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.53,384,1531810800"; d="scan'208";a="81012260" Received: from lahna.fi.intel.com (HELO lahna) ([10.237.72.157]) by FMSMGA003.fm.intel.com with SMTP; 17 Sep 2018 01:12:50 -0700 Received: by lahna (sSMTP sendmail emulation); Mon, 17 Sep 2018 11:12:49 +0300 Date: Mon, 17 Sep 2018 11:12:49 +0300 From: Mika Westerberg To: Rajat Jain Cc: Andy Shevchenko , Linus Walleij , linux-gpio@vger.kernel.org, Linux Kernel Mailing List , casey.g.bowman@intel.com, "Atwood, Matthew S" Subject: Re: pinctrl-icelake: driver writes to wrong offsets? Message-ID: <20180917081249.GM14465@lahna.fi.intel.com> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Sep 14, 2018 at 05:18:34PM -0700, Rajat Jain wrote: > This is to report what I think is a problem in the pinctrl-icelake > driver. It seems that when trying to control GPIO pins GPP_A* and > GPIO_B*, the driver ends up writing to incorrect PADCFG registers. > I've reached this conclusion by putting debug prints in the driver, > although this can be seen by the following commands too. Please let me > know if something is wrong in my experiments. For example, when trying > to control GPP_B8/ISH_I2C1_SCL, the driver ends up writing to > GPP_A6/ESPI_RESETB registers. Hmm, when you add debug prints to the driver and you access GPIO 224 (GPP_B8/ISH_I2C1_SCL) from userspace you can see that the driver actually uses PADCFG registers of GPP_A6/ESPI_RESETB? So that it is not just a side-effect of how the pins are wired on your board.