Received: by 2002:ac0:a5a6:0:0:0:0:0 with SMTP id m35-v6csp3867272imm; Mon, 17 Sep 2018 04:38:29 -0700 (PDT) X-Google-Smtp-Source: ANB0VdYrCaze0aKad4kcZIapP23E+RZWiWE4PnOzhsWRRwZQ2YVULUqBmnX10TcCUSDKsKbbeH3S X-Received: by 2002:a62:7a01:: with SMTP id v1-v6mr25349834pfc.153.1537184309357; Mon, 17 Sep 2018 04:38:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537184309; cv=none; d=google.com; s=arc-20160816; b=VIojrCHZwEOZiWxhPwqfsQ/SG59REEe7IFS+ivbx+FHFfPT/p2k+h2+okjy7K/ONWq cd5YF9IDzNY00NyqxE9B/8qRpLbM0FLoUbnB4OPqeOzLtQMpBQwmN7U60MI2T/zHdClN qifJpFxnMYupzsk5g7ukCqiRttZzL1CD3rf6DOGK+IpNAQBwItfKaebRJ4QeP0NfQoPi MK7jtLWc/4OGwJ7Jvi1ymKVHuCLdWeQZ0oJahSUk4/bwjatWqwm29wWw6cnuNELFvYYf FVrNC1KptbdMxtwvshKwJVZ/PF3b+9MT5+5Rbis6Mo43qSEYNuMQwUEXPriP7sERK9op P9SQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:subject:cc:to:from:date; bh=tDecZzp9LnwMMvWHr1YrcIMAWUyjoBBsZzLtSo/QdBs=; b=Y5A4tWSePOiQ0aVlG2rRH7tfDa8ZCOHjDxe94cxWWlYYRl1/zvmuOnChMnsZqh60he rhztXBv7wg0OmK9lh8LAm6UehKtEYyBAbBppxLSHqZQ7raqC5JC5g3ijthxanmcjIrhG EIODDIcmJWLKm6dxQ+DMMH8FwiVkDVVp4q1bk0FtIPuKdLDXz2CpSQsy0oS4GP5N+o3a lwlDd8ecDNZy1OyIlek47x0vj8KOpzy0zLPPSWRTq5KjyYSFjI/iADGZUZKXgzZR5ps7 bZl3dt79sN2pvUTQMYCduH+aAzgBbrkJcUJfSdIsScl/gzrP+RFPBRsqbDp2k4pHAFMU tQZA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id b10-v6si17453482plk.302.2018.09.17.04.38.13; Mon, 17 Sep 2018 04:38:29 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728235AbeIQREt (ORCPT + 99 others); Mon, 17 Sep 2018 13:04:49 -0400 Received: from mail.bootlin.com ([62.4.15.54]:35839 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727547AbeIQREt (ORCPT ); Mon, 17 Sep 2018 13:04:49 -0400 Received: by mail.bootlin.com (Postfix, from userid 110) id 97C882075C; Mon, 17 Sep 2018 13:37:51 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.bootlin.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from bbrezillon (AAubervilliers-681-1-99-10.w90-88.abo.wanadoo.fr [90.88.4.10]) by mail.bootlin.com (Postfix) with ESMTPSA id 510AB204AE; Mon, 17 Sep 2018 13:37:51 +0200 (CEST) Date: Mon, 17 Sep 2018 13:37:51 +0200 From: Boris Brezillon To: Yogesh Gaur Cc: linux-mtd@lists.infradead.org, marek.vasut@gmail.com, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, robh@kernel.org, mark.rutland@arm.com, shawnguo@kernel.org, linux-arm-kernel@lists.infradead.org, computersforpeace@gmail.com, frieder.schrempf@exceet.de, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 1/5] spi: spi-mem: Add driver for NXP FlexSPI controller Message-ID: <20180917133751.453ea6ed@bbrezillon> In-Reply-To: <1537177710-9379-2-git-send-email-yogeshnarayan.gaur@nxp.com> References: <1537177710-9379-1-git-send-email-yogeshnarayan.gaur@nxp.com> <1537177710-9379-2-git-send-email-yogeshnarayan.gaur@nxp.com> X-Mailer: Claws Mail 3.15.0-dirty (GTK+ 2.24.31; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Yogesh, On Mon, 17 Sep 2018 15:18:26 +0530 Yogesh Gaur wrote: > + > + /* > + * R/W functions for big- or little-endian registers: > + * The FSPI controller's endianness is independent of > + * the CPU core's endianness. So far, although the CPU > + * core is little-endian the FSPI controller can use > + * big-endian or little-endian. > + */ > + if (of_property_read_bool(np, "big-endian")) { > + f->write = fspi_writel_be; > + f->read = fspi_readl_be; > + } else { > + f->write = fspi_writel; > + f->read = fspi_readl; > + } Hm, isn't it something you can extract from the compatible string? I'd rather not allow users to set that in their DT if it's not something you can change. Regards, Boris