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[209.132.180.67]) by mx.google.com with ESMTP id q1-v6si16585311pfj.149.2018.09.17.06.30.02; Mon, 17 Sep 2018 06:30:23 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728328AbeIQS5A (ORCPT + 99 others); Mon, 17 Sep 2018 14:57:00 -0400 Received: from smtp17.cstnet.cn ([159.226.251.17]:56609 "EHLO cstnet.cn" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727124AbeIQS5A (ORCPT ); Mon, 17 Sep 2018 14:57:00 -0400 Received: from pw-vbox.higon.com (unknown [182.150.46.145]) by APP-09 (Coremail) with SMTP id swCowAAnjx4XrJ9bNJ6lCg--.0S2; Mon, 17 Sep 2018 21:29:03 +0800 (CST) From: Pu Wen To: bp@alien8.de, tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com, x86@kernel.org, thomas.lendacky@amd.com, pbonzini@redhat.com, tony.luck@intel.com, rkrcmar@redhat.com, boris.ostrovsky@oracle.com, jgross@suse.com, rjw@rjwysocki.net, lenb@kernel.org, viresh.kumar@linaro.org, mchehab@kernel.org, trenn@suse.com, shuah@kernel.org Cc: linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, linux-pci@vger.kernel.org, linux-acpi@vger.kernel.org, linux-edac@vger.kernel.org, linux-pm@vger.kernel.org, kvm@vger.kernel.org, xen-devel@lists.xenproject.org, Pu Wen Subject: [PATCH v7 00/16] Add support for Hygon Dhyana Family 18h processor Date: Mon, 17 Sep 2018 21:28:54 +0800 Message-Id: X-Mailer: git-send-email 2.7.4 X-CM-TRANSID: swCowAAnjx4XrJ9bNJ6lCg--.0S2 X-Coremail-Antispam: 1UD129KBjvJXoW3Gr1DXr4xXr17GFy8AFW5Jrb_yoW7WFyDpF ZFkrn5tFW8u3sxC3srCrn7urWfZa97CrW3Jw18W3sxX3W5ta4jqrs7G3WkGw1qvwn5Wr1I yFy5urWxK3Z7JaDanT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUv214x267AKxVW5JVWrJwAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xGY2AK02 1l84ACjcxK6xIIjxv20xvE14v26r1j6r1xM28EF7xvwVC0I7IYx2IY6xkF7I0E14v26r4j 6F4UM28EF7xvwVC2z280aVAFwI0_Gr0_Cr1l84ACjcxK6I8E87Iv6xkF7I0E14v26r4j6r 4UJwAS0I0E0xvYzxvE52x082IY62kv0487Mc02F40EFcxC0VAKzVAqx4xG6I80ewAv7VC0 I7IYx2IY67AKxVWUGVWUXwAv7VC2z280aVAFwI0_Gr1j6F4UJwAm72CE4IkC6x0Yz7v_Jr 0_Gr1lF7xvr2IYc2Ij64vIr41lF7I21c0EjII2zVCS5cI20VAGYxC7M4IIrI8v6xkF7I0E 8cxan2IY04v7MxAIw28IcxkI7VAKI48JMxC20s026xCaFVCjc4AY6r1j6r4UMI8I3I0E5I 8CrVAFwI0_Jr0_Jr4lx2IqxVCjr7xvwVAFwI0_JrI_JrWlx4CE17CEb7AF67AKxVW8ZVWr XwCIc40Y0x0EwIxGrwCI42IY6xIIjxv20xvE14v26r1j6r1xMIIF0xvE2Ix0cI8IcVCY1x 0267AKxVW8JVWxJwCI42IY6xAIw20EY4v20xvaj40_Wr1j6rW3Jr1lIxAIcVC2z280aVAF wI0_Gr0_Cr1lIxAIcVC2z280aVCY1x0267AKxVW8JVW8JrUvcSsGvfC2KfnxnUUI43ZEXa 7VU1fOz3UUUUU== X-Originating-IP: [182.150.46.145] X-CM-SenderInfo: psxzv046klw03qof0z/ Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org As a new x86 CPU Vendor, Chengdu Haiguang IC Design Co., Ltd (Hygon) is a Joint Venture between AMD and Haiguang Information Technology Co., Ltd., and aims at providing high performance x86 processor for China server market. The first generation Hygon's processor(Dhyana) originates from AMD technology and shares most of the architecture with AMD's family 17h, but with different CPU Vendor ID("HygonGenuine")/PCIE Device Vendor ID (0x1D94)/Family series number (Family 18h). To enable the support of Linux kernel to Hygon's CPU, we added a new vendor type (X86_VENDOR_HYGON, with value of 9) in arch/x86/include/ asm/processor.h, and shared most of kernel support codes with AMD family 17h. As Hygon will negotiate with AMD to make sure that only Hygon will use family 18h, so try to minimize code modification and share most codes with AMD under this consideration. This patch series have been applied and tested successfully on Hygon Dhyana SoC silicon. Also tested on AMD EPYC (Family 17h) processor, it works fine and makes no harm to the existing codes. v6->v7: - Rebased on 4.19-rc4 and tested against it. - Add Reviewed-by from Borislav Petkov for patches x86/cpu, x86/cpu/mtrr, perf/x86, x86/pci, x86/apic, x86/mce. - Refine the patch descriptions and fix some typos. - Remove unneeded vendor checking for patch x86/apic. - Restore the user-visible pr_err string in patch x86/bugs. v5->v6: - Rebased on 4.19-rc3 and tested against it. - Add Reviewed-by from Borislav Petkov for cacheinfo, smpboot, alternative and kvm. - Rework the patch subjects and patch descriptions. - Rework vendor checking for some patches to minimize the code modification. v4->v5: - Rebased on 4.19-rc1 and tested against it. - Add Reviewed-by from Boris Ostrovsky for Xen. - Rework EDAC patch without vendor checking for minimal modification. v3->v4: - Rebased on 4.18.3 and tested against it. - Merge patches 05/17 perfctr and 10/17 events in v3 to patch 05/16 PMU for better patch function group. - Add hygon_get_topology_early() in patch 01/16. - Rework vendor checking and refine coding style. - Add Acked-by from Bjorn Helgaas for pci. - Add Acked-by from Rafael J. Wysocki for cpufreq and acpi. v2->v3: - Rebased on 4.18-rc8 and tested against it. - Rework vendor checking codes to improve consistency. v1->v2: - Rebased on 4.18-rc6 and tested against it. - Split the patch set to small series of patches. - Rework patch descriptions. - Create a separated arch/x86/kernel/cpu/hygon.c for Dhyana CPU initialization to reduce long-term maintenance effort. Pu Wen (16): x86/cpu: Create Hygon Dhyana architecture support file x86/cpu: Get cache info and setup cache cpumap for Hygon Dhyana x86/cpu/mtrr: Support TOP_MEM2 and get MTRR number x86/smpboot: SMP init no delay and not flush caches before sleep perf/x86: Add Hygon Dhyana support to PMU infrastructure x86/alternative: Init ideal_nops for Hygon Dhyana x86/pci: Add Hygon Dhyana support to PCI and north bridge x86/apic: Add Hygon Dhyana support to APIC x86/bugs: Add mitigation to spectre and no meltdown for Hygon Dhyana x86/mce: Add Hygon Dhyana support to MCE infrastructure x86/kvm: Add Hygon Dhyana support to KVM infrastructure x86/xen: Add Hygon Dhyana support to Xen ACPI, x86: Add Hygon Dhyana support cpufreq, x86: Add Hygon Dhyana support EDAC, amd64: Add Hygon Dhyana support cpupower, x86: Add Hygon Dhyana support MAINTAINERS | 6 + arch/x86/Kconfig.cpu | 14 + arch/x86/events/amd/core.c | 4 + arch/x86/events/amd/uncore.c | 20 +- arch/x86/events/core.c | 4 + arch/x86/include/asm/cacheinfo.h | 1 + arch/x86/include/asm/kvm_emulate.h | 4 + arch/x86/include/asm/mce.h | 2 + arch/x86/include/asm/processor.h | 3 +- arch/x86/include/asm/virtext.h | 5 +- arch/x86/kernel/alternative.c | 4 + arch/x86/kernel/amd_nb.c | 47 ++- arch/x86/kernel/apic/apic.c | 7 + arch/x86/kernel/apic/probe_32.c | 1 + arch/x86/kernel/cpu/Makefile | 1 + arch/x86/kernel/cpu/bugs.c | 4 +- arch/x86/kernel/cpu/cacheinfo.c | 31 +- arch/x86/kernel/cpu/common.c | 1 + arch/x86/kernel/cpu/cpu.h | 1 + arch/x86/kernel/cpu/hygon.c | 411 +++++++++++++++++++++ arch/x86/kernel/cpu/mcheck/mce-severity.c | 3 +- arch/x86/kernel/cpu/mcheck/mce.c | 20 +- arch/x86/kernel/cpu/mtrr/cleanup.c | 3 +- arch/x86/kernel/cpu/mtrr/mtrr.c | 2 +- arch/x86/kernel/cpu/perfctr-watchdog.c | 2 + arch/x86/kernel/smpboot.c | 4 +- arch/x86/kvm/emulate.c | 11 +- arch/x86/pci/amd_bus.c | 6 +- arch/x86/xen/pmu.c | 12 +- drivers/acpi/acpi_pad.c | 1 + drivers/acpi/processor_idle.c | 1 + drivers/cpufreq/acpi-cpufreq.c | 5 + drivers/cpufreq/amd_freq_sensitivity.c | 9 +- drivers/edac/amd64_edac.c | 8 +- drivers/edac/mce_amd.c | 4 +- include/linux/pci_ids.h | 2 + tools/power/cpupower/utils/cpufreq-info.c | 6 +- tools/power/cpupower/utils/helpers/amd.c | 4 +- tools/power/cpupower/utils/helpers/cpuid.c | 8 +- tools/power/cpupower/utils/helpers/helpers.h | 2 +- tools/power/cpupower/utils/helpers/misc.c | 2 +- .../cpupower/utils/idle_monitor/mperf_monitor.c | 3 +- 42 files changed, 641 insertions(+), 48 deletions(-) create mode 100644 arch/x86/kernel/cpu/hygon.c -- 2.7.4