Received: by 2002:ac0:a5a6:0:0:0:0:0 with SMTP id m35-v6csp4292172imm; Mon, 17 Sep 2018 11:18:04 -0700 (PDT) X-Google-Smtp-Source: ANB0VdYgzAmKn/LvCCZ3wLukqew8fJS5ou2lt0gWOm8J4oKm1LOaoZwTiL4J4syCj+CrMH3alMDS X-Received: by 2002:a17:902:1101:: with SMTP id d1-v6mr26348345pla.131.1537208284677; Mon, 17 Sep 2018 11:18:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537208284; cv=none; d=google.com; s=arc-20160816; b=0NeAt8x9B+I51rdLLDGWlM3mUBg7b4POxd2mAeScQxSVonl+TBh/QNSJfpd7J35bmh y+ZrOGMFn1Iih/9DUsAPAqKHuktbMFg87DV8hkLNueEhaqnMRBn4zWq4gpTpdrt4oEOm jqDSXB4sCZ8St/KzhFdyvt4Gd5dWpbKeN70TjmDdMfN3z9ROPLymccx9czew0J7FLJdk 0+TGBO2NhPKz56OyN5kuRGuXsf6kGq3hgrA7Gs23OMvCb7g3cD/IZokjeS7Zze1zNgcE WWTPqwKnrQ0tO6dglY8qYHnIqLFCHXQX50A8bNRTlpuuECB0wQOUVLoWo2MII4dLfBl6 Neiw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:dkim-signature; bh=wCvv9G021xE5LetzLjao10wQ//d6/munYg0sLqXWK4I=; b=FZg/8bB5svwvLxVgo71sKfJIVyoHgk6ANAbqeno4yS0PlkhvR0Hjad4zMVSXddXq0x zZzNjN6aHp+civqMY1AzrOEAgqvKSBTbLYQKz+F8ERaRJsjwLD1QDP1SBm6YAkRDRoyg RC4PF1VDYpchiBtViQE7fSJnHVb9IZxc3JUN0/ZybcZxCSpDEpYSJZQW2zTrEp050iru NakC157blmfa7xDN6wbRvEf6HpqRzQOXNT+DdWu3BON7GLiRh/0/68Rh6XamrQNdsWJx K5ebXgafBS/lJ8obljaPWGGaxgFiioHvT7mgIlA3PZwuGcJmvnf+kYA9ocg3EBPQ4jPU u9Tw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20161025 header.b=QJFnUEOJ; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id h65-v6si17137227pfb.70.2018.09.17.11.17.48; Mon, 17 Sep 2018 11:18:04 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20161025 header.b=QJFnUEOJ; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728543AbeIQXpt (ORCPT + 99 others); Mon, 17 Sep 2018 19:45:49 -0400 Received: from mail-yb1-f195.google.com ([209.85.219.195]:32851 "EHLO mail-yb1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728007AbeIQXpt (ORCPT ); Mon, 17 Sep 2018 19:45:49 -0400 Received: by mail-yb1-f195.google.com with SMTP id y9-v6so4157701ybh.0 for ; Mon, 17 Sep 2018 11:17:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=wCvv9G021xE5LetzLjao10wQ//d6/munYg0sLqXWK4I=; b=QJFnUEOJtr/eeZnOjRBQlfBGUJNeTNmv909joX9GL83rWqdTspAT/zCFM2B7dIsRnF C+HcHgxlYHlEwR8Xkfa2aw5oo46IMdHTlBhRKebt+wZ9oiyqU3QQbQGU24JR9ARMRtu7 fbAlzRMoFDjfLe5bd4hBaiSXwHJYU66/YYnRZxE7JRrQs/tyifprXxISHQBEKLq2B3DB 9lP+d22nPTM6IpzyTF1t02KpBD9Cs6dgMdty7yns6AR1sk74ZSzlqlW66lLe/awLCG67 FBbJICZERaAnodT1r8jthwVct1I2j19XwMfTxJSnFbo1AqzPRnj2ANxAnxHxkVs/N4aT /iTw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=wCvv9G021xE5LetzLjao10wQ//d6/munYg0sLqXWK4I=; b=aQSg+BS1+iw+VWoAiapcUIoeZDnjwTRNcfM71M2kvTvYh6deaakQOK/hKPMotyDOaM 8Gso5neOCoWA8EklKHk8tvbNOOGjawN2flPV+O8H4MIjF01Kb9f4WkhFFFvjXKUvn/vO Y29CngSqHwTWi++VYfNymX0ijc6QKfDwAOG2iOrN/yWqOAzwy42k50h/kkGsIowatdR6 F+pe05GWCwT33l07onEcsVcSgdWsGu0m5uQqNg0QTuLJJMBJ2cGYv37bL3svheezJO4C lXmVk+prnxOtgCWClkRN8rQch3RJZqwDZYpkJF+5VerjTgKDfHq3dm8Yj+QfqRCyoq0l 8gWA== X-Gm-Message-State: APzg51C30b7QaAqgev+KNP3zoCZA0i9N4ZAmGZsk+jCWpAcda3juMX8A eceZrzGXhvc36IE+ar7g5m+FkL63XM6h9IajjqNEXBv1STo= X-Received: by 2002:a25:bc92:: with SMTP id e18-v6mr11300618ybk.182.1537208238148; Mon, 17 Sep 2018 11:17:18 -0700 (PDT) MIME-Version: 1.0 References: <20180917081249.GM14465@lahna.fi.intel.com> In-Reply-To: <20180917081249.GM14465@lahna.fi.intel.com> From: Rajat Jain Date: Mon, 17 Sep 2018 11:16:41 -0700 Message-ID: Subject: Re: pinctrl-icelake: driver writes to wrong offsets? To: Mika Westerberg Cc: Andy Shevchenko , Linus Walleij , linux-gpio@vger.kernel.org, Linux Kernel Mailing List , casey.g.bowman@intel.com, "Atwood, Matthew S" Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Sep 17, 2018 at 1:13 AM Mika Westerberg wrote: > > On Fri, Sep 14, 2018 at 05:18:34PM -0700, Rajat Jain wrote: > > This is to report what I think is a problem in the pinctrl-icelake > > driver. It seems that when trying to control GPIO pins GPP_A* and > > GPIO_B*, the driver ends up writing to incorrect PADCFG registers. > > I've reached this conclusion by putting debug prints in the driver, > > although this can be seen by the following commands too. Please let me > > know if something is wrong in my experiments. For example, when trying > > to control GPP_B8/ISH_I2C1_SCL, the driver ends up writing to > > GPP_A6/ESPI_RESETB registers. > > Hmm, when you add debug prints to the driver and you access GPIO 224 > (GPP_B8/ISH_I2C1_SCL) from userspace you can see that the driver > actually uses PADCFG registers of GPP_A6/ESPI_RESETB? So that it is not > just a side-effect of how the pins are wired on your board. Right, also I don't have to use put debug prints as it can be seen from the following debug files. And it is not isolated to just this pin. For instance, in this examples you can see that another pin 18 (GPP_B10/I2C5_SCL) that I'm trying to write , the value actually gets written to the PADCFG for (GPP_A8/I2S2_SFRM) i.e. pin42. So there is clearly a pattern: static const struct pinctrl_pin_desc icllp_pins[] = { ... /* GPP_B */ .. PINCTRL_PIN(18, "I2C5_SCL"), <----- GPP_B10/I2C5_SCL = Pin 18 .... localhost /sys/class/gpio # cat /sys/kernel/debug/pinctrl/INT3455\:00/gpio-ranges GPIO ranges handled: 0: INT3455:00 GPIOS [184 - 191] PINS [0 - 7] 32: INT3455:00 GPIOS [216 - 241] PINS [8 - 33] <---- pin 18 = gpio 226 .... localhost /sys/class/gpio # cat /sys/kernel/debug/pinctrl/INT3455\:00/pins | grep "I2C5_SCL\|(I2S2_SFRM)" pin 18 (I2C5_SCL) mode 1 0x44000702 0x0000002a 0x00000000 [ACPI] pin 42 (I2S2_SFRM) mode 2 0x44000b00 0x00000040 0x00000100 [ACPI] localhost /sys/class/gpio # localhost /sys/class/gpio # echo 226 > export localhost /sys/class/gpio # cat /sys/kernel/debug/pinctrl/INT3455\:00/pins | grep "I2C5_SCL\|(I2S2_SFRM)" pin 18 (I2C5_SCL) GPIO 0x44000102 0x0000002a 0x00000000 [ACPI] pin 42 (I2S2_SFRM) mode 2 0x44000b00 0x00000040 0x00000100 [ACPI] localhost /sys/class/gpio # localhost /sys/class/gpio # localhost /sys/class/gpio # cat gpio226/value 0 localhost /sys/class/gpio # cat gpio226/direction in localhost /sys/class/gpio # echo out > gpio226/direction localhost /sys/class/gpio # cat gpio226/direction out localhost /sys/class/gpio # cat /sys/kernel/debug/pinctrl/INT3455\:00/pins | grep "I2C5_SCL\|(I2S2_SFRM)" pin 18 (I2C5_SCL) GPIO 0x44000200 0x0000002a 0x00000000 [ACPI] pin 42 (I2S2_SFRM) mode 2 0x44000b00 0x00000040 0x00000100 [ACPI] localhost /sys/class/gpio # localhost /sys/class/gpio # localhost /sys/class/gpio # cat gpio226/value 0 localhost /sys/class/gpio # echo 1 > gpio226/value localhost /sys/class/gpio # cat gpio226/value 0 localhost /sys/class/gpio # cat /sys/kernel/debug/pinctrl/INT3455\:00/pins | grep "I2C5_SCL\|(I2S2_SFRM)" pin 18 (I2C5_SCL) GPIO 0x44000200 0x0000002a 0x00000000 [ACPI] pin 42 (I2S2_SFRM) mode 2 0x44000b01 0x00000040 0x00000100 [ACPI] localhost /sys/class/gpio # As you can see in the above example, when I export the pins and change the directions from "in" to "out" PADCFG get updated correctly for pin 18, but when writing the value, it is the PADCFG for pin 42 that gets updated which is incorrect. So this looks like a driver issue to me. Please let me know if I need to file a bug on bugzilla for this. Thanks, Rajat