Received: by 2002:ac0:a5a6:0:0:0:0:0 with SMTP id m35-v6csp4557941imm; Mon, 17 Sep 2018 16:31:58 -0700 (PDT) X-Google-Smtp-Source: ANB0VdY878zdIkgnLzoSQ2N/8xaRHWqUTfpvcrlhExKg4n3mjqrJB7jwGu3/B9g0b0zaKGinyEHz X-Received: by 2002:a63:4826:: with SMTP id v38-v6mr25502779pga.379.1537227118522; Mon, 17 Sep 2018 16:31:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537227118; cv=none; d=google.com; s=arc-20160816; b=zsMMLKv16u0yGLs27P4HZNJdTbZ2PQpHM9QVS7H0B/+DsK+hBibYLRKOcCmSxSxaN/ voDzuqdpNmvcQ/WZVOu9ufVjoyPJR0EOqdVuHf16gU+0ae2YIk+kKv5ac/b6cCxeqcXS rRo7CwBbbnBqQTF1VrPUtfn0NFbU+tVzet8RoiR96JZQ0ocdoNT4Li/NZGPBcr4skPWV WBTDF96lZQMiviYKtYDZPvciAd1ViPV7IFarsAnkXUrdtGVKQ7o+TS6M5n4eTr6oU4GP Q9ksH+3fErr4dKOVrohFJTRmFKp15O7zNUhpIMjYmUC1mwlw8rxwKhKbb76Ex7Nlurwm 4A2w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :user-agent:references:in-reply-to:message-id:date:subject:cc:to :from; bh=8EJbvCHQZ7+93HuIF4nIMBeIYsyonPTOTtIla9HIJiQ=; b=yGNpu4dvUvYFaX0boD6Gc7I6hJ8+S6txyMZZd15X23RR1zmckOa66JC1ZP5imGSjoR 6IPQ0JeZLAHCMGVyUYrtd7yg3dKARCJs576q5Hvr8dKFfodTfKEnsbme7mcR7FF3zZMq /xcQz8z12shZHXNzSvgO0wfy6pbcJ1AREyCHAkyv93dZ6lDAOa5jBnoYzEMG6VTtfnGv tQfKiceq+7i69mHRsBhCdJ+J9bnrZDonA1VDilDx0fR/5jTfsClx4GYHGoD6cJtuzALK d/vx4bXudj0MvFQL4PDK2uJw3yVqfR7zaKhroG/1Ck4mUbroUYLEXWFlo1tEBAJH1ByA O/Kw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id g15-v6si16305576plo.284.2018.09.17.16.31.43; Mon, 17 Sep 2018 16:31:58 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729955AbeIRE3v (ORCPT + 99 others); Tue, 18 Sep 2018 00:29:51 -0400 Received: from mail.linuxfoundation.org ([140.211.169.12]:48058 "EHLO mail.linuxfoundation.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727559AbeIRE3u (ORCPT ); Tue, 18 Sep 2018 00:29:50 -0400 Received: from localhost (li1825-44.members.linode.com [172.104.248.44]) by mail.linuxfoundation.org (Postfix) with ESMTPSA id 8204FC77; Mon, 17 Sep 2018 23:00:21 +0000 (UTC) From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Filippo Sironi , Borislav Petkov , Thomas Gleixner , prarit@redhat.com Subject: [PATCH 4.14 017/126] x86/microcode: Update the new microcode revision unconditionally Date: Tue, 18 Sep 2018 00:41:05 +0200 Message-Id: <20180917211705.818051135@linuxfoundation.org> X-Mailer: git-send-email 2.19.0 In-Reply-To: <20180917211703.481236999@linuxfoundation.org> References: <20180917211703.481236999@linuxfoundation.org> User-Agent: quilt/0.65 X-stable: review MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 4.14-stable review patch. If anyone has any objections, please let me know. ------------------ From: Filippo Sironi commit 8da38ebaad23fe1b0c4a205438676f6356607cfc upstream. Handle the case where microcode gets loaded on the BSP's hyperthread sibling first and the boot_cpu_data's microcode revision doesn't get updated because of early exit due to the siblings sharing a microcode engine. For that, simply write the updated revision on all CPUs unconditionally. Signed-off-by: Filippo Sironi Signed-off-by: Borislav Petkov Signed-off-by: Thomas Gleixner Cc: prarit@redhat.com Cc: stable@vger.kernel.org Link: http://lkml.kernel.org/r/1533050970-14385-1-git-send-email-sironi@amazon.de Signed-off-by: Greg Kroah-Hartman --- arch/x86/kernel/cpu/microcode/amd.c | 22 +++++++++++++--------- arch/x86/kernel/cpu/microcode/intel.c | 13 ++++++++----- 2 files changed, 21 insertions(+), 14 deletions(-) --- a/arch/x86/kernel/cpu/microcode/amd.c +++ b/arch/x86/kernel/cpu/microcode/amd.c @@ -504,6 +504,7 @@ static enum ucode_state apply_microcode_ struct microcode_amd *mc_amd; struct ucode_cpu_info *uci; struct ucode_patch *p; + enum ucode_state ret; u32 rev, dummy; BUG_ON(raw_smp_processor_id() != cpu); @@ -521,9 +522,8 @@ static enum ucode_state apply_microcode_ /* need to apply patch? */ if (rev >= mc_amd->hdr.patch_id) { - c->microcode = rev; - uci->cpu_sig.rev = rev; - return UCODE_OK; + ret = UCODE_OK; + goto out; } if (__apply_microcode_amd(mc_amd)) { @@ -531,17 +531,21 @@ static enum ucode_state apply_microcode_ cpu, mc_amd->hdr.patch_id); return UCODE_ERROR; } - pr_info("CPU%d: new patch_level=0x%08x\n", cpu, - mc_amd->hdr.patch_id); - uci->cpu_sig.rev = mc_amd->hdr.patch_id; - c->microcode = mc_amd->hdr.patch_id; + rev = mc_amd->hdr.patch_id; + ret = UCODE_UPDATED; + + pr_info("CPU%d: new patch_level=0x%08x\n", cpu, rev); + +out: + uci->cpu_sig.rev = rev; + c->microcode = rev; /* Update boot_cpu_data's revision too, if we're on the BSP: */ if (c->cpu_index == boot_cpu_data.cpu_index) - boot_cpu_data.microcode = mc_amd->hdr.patch_id; + boot_cpu_data.microcode = rev; - return UCODE_UPDATED; + return ret; } static int install_equiv_cpu_table(const u8 *buf) --- a/arch/x86/kernel/cpu/microcode/intel.c +++ b/arch/x86/kernel/cpu/microcode/intel.c @@ -795,6 +795,7 @@ static enum ucode_state apply_microcode_ struct ucode_cpu_info *uci = ucode_cpu_info + cpu; struct cpuinfo_x86 *c = &cpu_data(cpu); struct microcode_intel *mc; + enum ucode_state ret; static int prev_rev; u32 rev; @@ -817,9 +818,8 @@ static enum ucode_state apply_microcode_ */ rev = intel_get_microcode_revision(); if (rev >= mc->hdr.rev) { - uci->cpu_sig.rev = rev; - c->microcode = rev; - return UCODE_OK; + ret = UCODE_OK; + goto out; } /* @@ -848,14 +848,17 @@ static enum ucode_state apply_microcode_ prev_rev = rev; } + ret = UCODE_UPDATED; + +out: uci->cpu_sig.rev = rev; - c->microcode = rev; + c->microcode = rev; /* Update boot_cpu_data's revision too, if we're on the BSP: */ if (c->cpu_index == boot_cpu_data.cpu_index) boot_cpu_data.microcode = rev; - return UCODE_UPDATED; + return ret; } static enum ucode_state generic_load_microcode(int cpu, void *data, size_t size,