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xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Sep 2018 06:24:08.4213 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7cdea7bf-634b-496a-e847-08d61ec1ac41 X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.60.83];Helo=[xsj-pvapsmtpgw01] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL0PR02MB4755 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 19.9.2018 20:08, Edgar E. Iglesias wrote: > On Wed, Sep 19, 2018 at 06:08:18PM +0200, Michal Simek wrote: >> Clear ADDR64 dma bit in DMACFG register in case that HW_DMA_CAP_64B >> is not detected on 64bit system. >> The issue was observed when bootloader(u-boot) does not check macb >> feature at DCFG6 register (DAW64_OFFSET) and enabling 64bit dma support >> by default. Then macb driver is reading DMACFG register back and only >> adding 64bit dma configuration but not cleaning it out. >> >> This is also align with other features which are also cleared if they are not >> present. > > Hi Michal, > >> >> Signed-off-by: Michal Simek >> --- >> >> drivers/net/ethernet/cadence/macb_main.c | 2 ++ >> 1 file changed, 2 insertions(+) >> >> diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c >> index 16e4ef7d7185..79707dff3f13 100644 >> --- a/drivers/net/ethernet/cadence/macb_main.c >> +++ b/drivers/net/ethernet/cadence/macb_main.c >> @@ -2163,6 +2163,8 @@ static void macb_configure_dma(struct macb *bp) >> #ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT >> if (bp->hw_dma_cap & HW_DMA_CAP_64B) >> dmacfg |= GEM_BIT(ADDR64); >> + else >> + dmacfg &= ~GEM_BIT(ADDR64); >> #endif > > I think you might want to do this clearing outside of the #ifdef. > If CONFIG_ARCH_DMA_ADDR_T_64BIT is not defined, we'd want to make > sure the ADDR64 is cleared. E.g something like: > > dmacfg &= ~GEM_BIT(ADDR64); > #ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT > if (bp->hw_dma_cap & HW_DMA_CAP_64B) > dmacfg |= GEM_BIT(ADDR64); > #endif > > > Same thing for the USE_HWSTAMP/PTP flags below. Origin patch, which introduce this read with mask, macfg = gem_readl(bp, DMACFG) & ~GEM_BF(RXBS, -1L); was done in 2011 and from that time this function was extended a little bit. I am even not quite sure if make sense to read this reg and apply setting on the top of it. Nicolas: Isn't it better simply compose that reg from scratch? Thanks, Michal