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From:   Can Guo <quic_cang@quicinc.com>
To:     subhashj@codeaurora.org, asutoshd@codeaurora.org,
        vivek.gautam@codeaurora.org, evgreen@chromium.org,
        rnayak@codeaurora.org, vinholikatti@gmail.com,
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Cc:     Can Guo <cang@codeaurora.org>,
        Amit Nischal <anischal@codeaurora.org>,
        Rob Herring <robh+dt@kernel.org>,
        Mark Rutland <mark.rutland@arm.com>,
        Mathieu Malaterre <malat@debian.org>,
        devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED
        DEVICE TREE BINDINGS), linux-kernel@vger.kernel.org (open list)
Subject: [PATCH v9 7/7] dt-bindings: ufshcd-pltfrm: Add core reset string
Date:   Thu, 20 Sep 2018 21:28:00 -0700
Message-Id: <1537504081-29976-8-git-send-email-quic_cang@quicinc.com>
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From: Can Guo <cang@codeaurora.org>

Add core reset support string for UFS.

Signed-off-by: Amit Nischal <anischal@codeaurora.org>
Signed-off-by: Can Guo <cang@codeaurora.org>
---
 Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
index c39dfef..6b697c4 100644
--- a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
+++ b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
@@ -11,6 +11,11 @@ Required properties:
 					  "qcom,ufshc"
 - interrupts        : <interrupt mapping for UFS host controller IRQ>
 - reg               : <registers mapping>
+- reset             : reset specifier pair consists of phandle for the reset provider
+                      and reset lines used by this controller. It is mandatory for
+		      QCOM SDM845 platform.
+- reset-names       : reset signal name strings sorted in the same order as the
+		      resets property. It is mandatory for QCOM SDM845 platform.
 
 Optional properties:
 - phys                  : phandle to UFS PHY node
@@ -64,6 +69,8 @@ Example:
 		clocks = <&core 0>, <&ref 0>, <&iface 0>;
 		clock-names = "core_clk", "ref_clk", "iface_clk";
 		freq-table-hz = <100000000 200000000>, <0 0>, <0 0>;
+		resets = <clock_gcc GCC_UFS_BCR>;
+		reset-names = "core_reset";
 		phys = <&ufsphy1>;
 		phy-names = "ufsphy";
 	};
-- 
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