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([2601:646:c200:7429:413c:2b8f:d2ea:80b3]) by smtp.gmail.com with ESMTPSA id z19-v6sm33715385pgi.33.2018.09.20.21.52.05 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 20 Sep 2018 21:52:05 -0700 (PDT) Content-Type: text/plain; charset=utf-8 Mime-Version: 1.0 (1.0) Subject: Re: [PATCH net-next v5 02/20] zinc: introduce minimal cryptography library From: Andy Lutomirski X-Mailer: iPhone Mail (15G77) In-Reply-To: Date: Thu, 20 Sep 2018 21:52:04 -0700 Cc: "Jason A. Donenfeld" , Andrew Lunn , Arnd Bergmann , Eric Biggers , LKML , Netdev , Linux Crypto Mailing List , David Miller , Greg Kroah-Hartman , Samuel Neves , Andrew Lutomirski , Jean-Philippe Aumasson Content-Transfer-Encoding: quoted-printable Message-Id: References: <20180918161646.19105-1-Jason@zx2c4.com> <20180918161646.19105-3-Jason@zx2c4.com> <20180921031255.GB11109@lunn.ch> <8FA361E3-FBCB-469E-88DC-F4085BD91175@amacapital.net> To: Ard Biesheuvel Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > On Sep 20, 2018, at 9:30 PM, Ard Biesheuvel wr= ote: >=20 >> On 20 September 2018 at 21:15, Jason A. Donenfeld wrote= : >> Hi Andy, >>=20 >>> On Fri, Sep 21, 2018 at 5:23 AM Andy Lutomirski wr= ote: >>> At the risk on suggesting something awful: on x86_64, since we turn pree= mption off for simd, it wouldn=E2=80=99t be *completely* insane to do the cr= ypto on the irq stack. It would look like: >>>=20 >>> kernel_fpu_call(func, arg); >>>=20 >>> And this helper would disable preemption, enable FPU, switch to the irq s= tack, call func(arg), disable FPU, enable preemption, and return. And we can= have large IRQ stacks. >>>=20 >>> I refuse to touch this with a ten-foot pole until the lazy FPU restore p= atches land. >>=20 >> Haha. That's fun, and maybe we'll do that at some point, but I have >> some other reasons too for being on a workqueue now. >>=20 >=20 > Kernel mode crypto is callable from any context, and SIMD can be used > in softirq context on arm64 (and on x86, even from hardirq context > IIRC if the interrupt is taken from userland), in which case we'd > already be on the irq stack. The x86_64 irq stack handles nesting already.