Received: by 2002:ac0:a5a6:0:0:0:0:0 with SMTP id m35-v6csp378211imm; Fri, 21 Sep 2018 01:36:38 -0700 (PDT) X-Google-Smtp-Source: ANB0VdY9000D/V1asGbehhKkyVJkQEBVk8C4TmXl2CZHqqT3Zghzn2bscDVsfXeLS2jCLFirBaeI X-Received: by 2002:a63:4a4b:: with SMTP id j11-v6mr40848865pgl.168.1537518998475; Fri, 21 Sep 2018 01:36:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537518998; cv=none; d=google.com; s=arc-20160816; b=w2MBcYSSjOz6IwB58Rg3fU2aegv8c3R58ffG0b3zovIWIbR0Vwa6A1Gg3aIVmqfRhM ifuBnRnr3PYShFfWo/wCg4tIM9bH75xPsDagVt3ZdRgS0kdTuGMl8XG8nZc04oL3x1QU p+Y1ztHLnKhTpuFtcDk++UGqRpqT8LKCojvJD4HaZbuIHeGPyQreib0yOK8eXKnHRsIL YBJWSF0sFiLyWckefnU7iFmAAvlRns4hh7mBZpE1N5fXz4qunNo6rg9t//NEWkNpCGik nPf8H33JriJ69I9q7DvTM2BnGpWEe+0W8Ru7m/3S1eO3PKBoCbLVgAMYNu8Qroa/4h1I /ymA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:message-id:date:subject:cc :to:from; bh=9q9UjtCzBEdb+iQpyvpjQTxRw53wXdb+IgXDElEv8RA=; b=oICHLiP+IbVOmn/qa+jDrzvI3y4dr96JmbT0oegri9dv7niqEbeSOSLb0uCE5Xv/wR xvOp4mmvm44fd2x5ypkVXUnJiMlyO6XBLwnskapMhG2POOeLEo1UAgXJULeBCoEQMKhy h6lZoiwPEQPgZ3CQziY/90c/pN1gc9dFrzWe7wgyguqDtQ7VFH3uuKsYr3FB7Rqhi2/d yNvXGim2Y3fWHJ9Lrc4KzFhNXSQQkkXsyxkAqs4SCU2EKbJjiHo5d98icy3Mz+QDJxDM ShwIUzEAj+D8Ri9t3bIRgkfisim7INIcn5JRqyOJQXlLGDOksP1MAmcYyNDmQ2e4vr+L fhgA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a33-v6si27829238pld.269.2018.09.21.01.36.21; Fri, 21 Sep 2018 01:36:38 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389448AbeIUOWk (ORCPT + 99 others); Fri, 21 Sep 2018 10:22:40 -0400 Received: from mail-sh2.amlogic.com ([58.32.228.45]:34904 "EHLO mail-sh2.amlogic.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727795AbeIUOWk (ORCPT ); Fri, 21 Sep 2018 10:22:40 -0400 Received: from localhost.localdomain (10.18.11.217) by mail-sh2.amlogic.com (10.18.11.6) with Microsoft SMTP Server id 15.0.1320.4; Fri, 21 Sep 2018 16:35:17 +0800 From: Jianxin Pan To: Kevin Hilman , CC: Jianxin Pan , Rob Herring , Neil Armstrong , Jerome Brunet , Carlo Caione , Jian Hu , Yixun Lan , Hanjie Lin , Qiufang Dai , Victor Wan , , , Subject: [PATCH v5 0/2] arm64: dts: meson-g12a: Introduce new DT files for Meson-G12A SoC Date: Fri, 21 Sep 2018 16:34:39 +0800 Message-ID: <1537518881-53137-1-git-send-email-jianxin.pan@amlogic.com> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.18.11.217] Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This attempt will try to add new DT files to support Meson-G12A SoC. 1) first, Please notice that, in this patch series, the DT node about 16M reserved memory for hwrom is removed, since it's not needed by G12A SoC. 2) second, the pclk for uart_AO need to be fixed once G12A clock_ao driver is merged. In this version, it rely on bootloader to enable the pclk gate which belong to AO clock domain. Please add clk_ignore_unused to bootargs. Changes since v4 [3]: - add chosen and memory node Changes since v3 [2]: - collect Rob's Reviewed-by - test on latest v4.20/integ Changes since v2 [1]: - reorder subnodes - collect Rob's Reviewed-by Changes since v1 [0]: - fix signoff typo - order subnodes by addresses when there is one and alphabetically when there is none [0] https://lore.kernel.org/lkml/1533802951-49919-2-git-send-email-jianxin.pan@amlogic.com [1] https://lore.kernel.org/lkml/1534160901-22889-1-git-send-email-jianxin.pan@amlogic.com [2] https://lore.kernel.org/lkml/1534243121-33589-1-git-send-email-jianxin.pan@amlogic.com [3] https://lore.kernel.org/lkml/1537427368-11104-1-git-send-email-jianxin.pan@amlogic.com Jianxin Pan (2): dt-bindings: arm: amlogic: Add Meson G12A binding arm64: dts: meson-g12a: add initial g12a s905d2 SoC DT support Documentation/devicetree/bindings/arm/amlogic.txt | 6 + arch/arm64/boot/dts/amlogic/Makefile | 1 + arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts | 29 ++++ arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 172 ++++++++++++++++++++++ 4 files changed, 208 insertions(+) create mode 100644 arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts create mode 100644 arch/arm64/boot/dts/amlogic/meson-g12a.dtsi -- 1.9.1