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[209.132.180.67]) by mx.google.com with ESMTP id t5-v6si25637628ply.193.2018.09.21.02.52.04; Fri, 21 Sep 2018 02:52:19 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389672AbeIUPey (ORCPT + 99 others); Fri, 21 Sep 2018 11:34:54 -0400 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:29161 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2389010AbeIUPey (ORCPT ); Fri, 21 Sep 2018 11:34:54 -0400 Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx08-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w8L9iYMa008894; Fri, 21 Sep 2018 11:46:30 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2mmkmu38k0-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 21 Sep 2018 11:46:30 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 9E57B38; Fri, 21 Sep 2018 09:46:29 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas23.st.com [10.75.90.46]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 76A822AC3; Fri, 21 Sep 2018 09:46:29 +0000 (GMT) Received: from SAFEX1HUBCAS22.st.com (10.75.90.93) by SAFEX1HUBCAS23.st.com (10.75.90.46) with Microsoft SMTP Server (TLS) id 14.3.361.1; Fri, 21 Sep 2018 11:46:29 +0200 Received: from lmecxl0923.lme.st.com (10.48.0.237) by Webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.361.1; Fri, 21 Sep 2018 11:46:28 +0200 From: Ludovic Barre To: Ulf Hansson , Rob Herring CC: Maxime Coquelin , Alexandre Torgue , , Gerald Baeza , Loic Pallardy , , , , , , Ludovic Barre Subject: [PATCH V2 00/27] mmc: mmci: add sdmmc variant for stm32 Date: Fri, 21 Sep 2018 11:45:54 +0200 Message-ID: <1537523181-14578-1-git-send-email-ludovic.Barre@st.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.48.0.237] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2018-09-21_04:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ludovic Barre The goal of this serie is to add support of sdmmc for stm32. Be to able to add this new variant it is needed to do some changes in mmci core: -Internalize specific needs of legacy dmaengine. -Create and setup dma_priv pointer -Create generic callbacks which share some features (like cookie...) and call specific needs change v3: -remove __dma_inprogress rename -remove bad space at end of "st,use-ckin" change v2: -rename to mmci_prep/unprep_data -rename specific dma engine structure to mmci_dmae_next/priv -follow "_" recommandation -remove dma prefixe of mmci_dmae_priv fields Ludovic Barre (27): mmc: mmci: internalize dma map/unmap into mmci dma functions mmc: mmci: internalize dma_inprogress into mmci dma functions mmc: mmci: convert dma_setup callback to return an int mmc: mmci: introduce dma_priv pointer to mmci_host mmc: mmci: move mmci next cookie to mci host mmc: mmci: merge prepare data functions mmc: mmci: add prepare/unprepare_data callbacks mmc: mmci: add get_next_data callback mmc: mmci: modify dma_setup callback mmc: mmci: add dma_release callback mmc: mmci: add dma_start callback mmc: mmci: add dma_finalize callback mmc: mmci: add dma_error callback mmc: mmci: add validate_data callback mmc: mmci: add set_clk/pwrreg callbacks mmc: mmci: add datactrl block size variant property mmc: mmci: expand startbiterr to irqmask and error check mmc: mmci: add variant properties to define cpsm & cmdresp bits mmc: mmci: add variant property to define dpsm bit mmc: mmci: add variant property to define irq pio mask mmc: mmci: add variant property to write datactrl before command mmc: mmci: add variant property to not read datacnt mmc: mmci: add variant property to request a reset mmc: mmci: add clock divider for stm32 sdmmc mmc: mmci: add stm32 sdmmc registers mmc: mmci: add DT bindings for STM32 sdmmc mmc: mmci: add stm32 sdmmc variant Documentation/devicetree/bindings/mmc/mmci.txt | 11 + drivers/mmc/host/Kconfig | 10 + drivers/mmc/host/Makefile | 1 + drivers/mmc/host/mmci.c | 646 +++++++++++++++++-------- drivers/mmc/host/mmci.h | 147 +++++- drivers/mmc/host/mmci_qcom_dml.c | 15 +- drivers/mmc/host/mmci_stm32_sdmmc.c | 282 +++++++++++ 7 files changed, 880 insertions(+), 232 deletions(-) create mode 100644 drivers/mmc/host/mmci_stm32_sdmmc.c -- 2.7.4