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[217.229.21.163]) by smtp.gmail.com with ESMTPSA id d22-v6sm45651320wra.80.2018.09.21.03.25.49 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 21 Sep 2018 03:25:49 -0700 (PDT) From: Thierry Reding To: Linus Walleij , Thierry Reding Cc: Thomas Gleixner , devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/9] dt-bindings: tegra186-pmc: Add interrupt controller properties Date: Fri, 21 Sep 2018 12:25:38 +0200 Message-Id: <20180921102546.12745-2-thierry.reding@gmail.com> X-Mailer: git-send-email 2.19.0 In-Reply-To: <20180921102546.12745-1-thierry.reding@gmail.com> References: <20180921102546.12745-1-thierry.reding@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Thierry Reding The PMC can be a top-level interrupt controller that provides the top- level controls for wake events. Add optional properties to mark the PMC as interrupt controller. Signed-off-by: Thierry Reding --- .../devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt index c9fd6d1de57e..2d89cdc39eb0 100644 --- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt @@ -15,6 +15,9 @@ Required properties: Optional properties: - nvidia,invert-interrupt: If present, inverts the PMU interrupt signal. +- interrupt-controller: Identifies the node as an interrupt controller. +- #interrupt-cells: Specifies the number of cells needed to encode an + interrupt source. The value must be 2. Example: -- 2.19.0