Received: by 2002:ac0:a5a6:0:0:0:0:0 with SMTP id m35-v6csp1371281imm; Sun, 23 Sep 2018 02:38:40 -0700 (PDT) X-Google-Smtp-Source: ANB0VdYznOXhSZQJUTu0gADXmbK5+uqvp9qb9M8DRMGM1DuswtnS7sspdVai4YQ2IkKhRSViUO4K X-Received: by 2002:a62:9c17:: with SMTP id f23-v6mr5685576pfe.209.1537695520872; Sun, 23 Sep 2018 02:38:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537695520; cv=none; d=google.com; s=arc-20160816; b=wMAzmzKXLu3t6F70jAAoJJJjfazOR9/3Kz7HFl5bn0S5xWROF6KFyMJ9CudKXr/aK+ ee2LCQa9NufOq3JqN4xZMviMk9FZlzHCexOymv1x2fF+PfG9Y28gnRb77nxRTigChqFq Vm20nX5boDolG5KzAqfn/IqNEaulsMPOafB4WAqi/9akkocG3ORmXInCTnV8qxQrqKGL 2J8L7GAUBxplnAmhebgtp/NLomUlg/A77G5tNWLImnrYPLlAY95U5i5GWsHq77sbPBfi +O6nssbG3vN/9icO35yUKuTmQ6s5mSXehJZ59kSjQAbwmwV5DunRNGxBYg4BxYCMBLzv mcnw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=ae7q+KfTT5NCKLX0yNE6eFo/eG3nM/8fm4NRIaCDxvo=; b=uXhfkNA7GFKjkOVOUbVo/BGffY/R1lzIkMz/vscSAgW6LSMhD1dYECpEIAen1Fexp+ TuFwUcZ61gqVrlk9JqPvV0kKHRxxOWDNSxi6VZ0tesa2XhEYHUuA/PgsrwW9oG0e+Eum +PGKedu+aPuR52c6HM/Wao4D1Ekshb4lED0QQvaZaFOI1lVBQNj5b3fhfY2PXZWnD7Uk CpIY5XJAoW5ays+TvHd0QD/ndxCXcebOj4PJ8feGL3Wzjpweex+EF4UBK5vzyptII15F r0oYDOYsp+tJWjToij9LOlMXTEDt8mdwELyEWv8TvrT+amp58yR/yykR8A2cdMzjqtJw ldOg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f2-v6si29077423pgg.552.2018.09.23.02.38.26; Sun, 23 Sep 2018 02:38:40 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726690AbeIWPfI (ORCPT + 99 others); Sun, 23 Sep 2018 11:35:08 -0400 Received: from smtp21.cstnet.cn ([159.226.251.21]:51015 "EHLO cstnet.cn" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726047AbeIWPfI (ORCPT ); Sun, 23 Sep 2018 11:35:08 -0400 Received: from pw-vbox.higon.com (unknown [182.150.46.145]) by APP-01 (Coremail) with SMTP id qwCowAAHCan7XqdbqHKzDA--.3S2; Sun, 23 Sep 2018 17:38:07 +0800 (CST) From: Pu Wen To: bp@alien8.de, mchehab@kernel.org, tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com, x86@kernel.org, thomas.lendacky@amd.com Cc: linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, linux-edac@vger.kernel.org, Pu Wen Subject: [PATCH v8 15/16] EDAC, amd64: Add Hygon Dhyana support Date: Sun, 23 Sep 2018 17:37:58 +0800 Message-Id: <9d71061301177822bc55b3bfd44f91057458d886.1537533369.git.puwen@hygon.cn> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: X-CM-TRANSID: qwCowAAHCan7XqdbqHKzDA--.3S2 X-Coremail-Antispam: 1UD129KBjvJXoWxWr1kCr48WFy7ZrWkGrWktFb_yoW5Wr4xpr WUGFsxXr1Iqa43Jrn5ArWDXF1fC3Z7tFyakws2ka1FvayDJa45Wa4Iyay3Zry8Gry8GryI ya1Fgw45C3WvqFUanT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUvI14x267AKxVW8JVW5JwAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xGY2AK02 1l84ACjcxK6xIIjxv20xvE14v26r4j6ryUM28EF7xvwVC0I7IYx2IY6xkF7I0E14v26r4U JVWxJr1l84ACjcxK6I8E87Iv67AKxVW8JVWxJwA2z4x0Y4vEx4A2jsIEc7CjxVAFwI0_Gr 1j6F4UJwAS0I0E0xvYzxvE52x082IY62kv0487Mc02F40EFcxC0VAKzVAqx4xG6I80ewAv 7VC0I7IYx2IY67AKxVWUtVWrXwAv7VC2z280aVAFwI0_Gr0_Cr1lOx8S6xCaFVCjc4AY6r 1j6r4UM4x0Y48IcxkI7VAKI48JM4x0x7Aq67IIx4CEVc8vx2IErcIFxwACI402YVCY1x02 628vn2kIc2xKxwCF04k20xvY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c 02F40E14v26r1j6r18MI8I3I0E7480Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_Jw0_ GFylIxkGc2Ij64vIr41lIxAIcVC0I7IYx2IY67AKxVW8JVW5JwCI42IY6xIIjxv20xvEc7 CjxVAFwI0_Gr1j6F4UJwCI42IY6xAIw20EY4v20xvaj40_Gr0_Zr1lIxAIcVC2z280aVAF wI0_Gr0_Cr1lIxAIcVC2z280aVCY1x0267AKxVW8Jr0_Cr1UYxBIdaVFxhVjvjDU0xZFpf 9x0JUD-B_UUUUU= X-Originating-IP: [182.150.46.145] X-CM-SenderInfo: psxzv046klw03qof0z/ Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org To make AMD64 EDAC and MCE drivers working on Hygon platform, add support for Hygon Dhyana CPU by using the code path of AMD family 17h. Signed-off-by: Pu Wen --- drivers/edac/amd64_edac.c | 8 +++++++- drivers/edac/mce_amd.c | 4 +++- 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index 18aeabb..bf3314b 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c @@ -211,7 +211,7 @@ static int __set_scrub_rate(struct amd64_pvt *pvt, u32 new_bw, u32 min_rate) scrubval = scrubrates[i].scrubval; - if (pvt->fam == 0x17) { + if (pvt->fam == 0x17 || pvt->fam == 0x18) { __f17h_set_scrubval(pvt, scrubval); } else if (pvt->fam == 0x15 && pvt->model == 0x60) { f15h_select_dct(pvt, 0); @@ -264,6 +264,7 @@ static int get_scrub_rate(struct mem_ctl_info *mci) break; case 0x17: + case 0x18: amd64_read_pci_cfg(pvt->F6, F17H_SCR_BASE_ADDR, &scrubval); if (scrubval & BIT(0)) { amd64_read_pci_cfg(pvt->F6, F17H_SCR_LIMIT_ADDR, &scrubval); @@ -1044,6 +1045,7 @@ static void determine_memory_type(struct amd64_pvt *pvt) goto ddr3; case 0x17: + case 0x18: if ((pvt->umc[0].dimm_cfg | pvt->umc[1].dimm_cfg) & BIT(5)) pvt->dram_type = MEM_LRDDR4; else if ((pvt->umc[0].dimm_cfg | pvt->umc[1].dimm_cfg) & BIT(4)) @@ -3188,8 +3190,11 @@ static struct amd64_family_type *per_family_init(struct amd64_pvt *pvt) break; case 0x17: + case 0x18: fam_type = &family_types[F17_CPUS]; pvt->ops = &family_types[F17_CPUS].ops; + if (pvt->fam == 0x18) + family_types[F17_CPUS].ctl_name = "F18h"; break; default: @@ -3428,6 +3433,7 @@ static const struct x86_cpu_id amd64_cpuids[] = { { X86_VENDOR_AMD, 0x15, X86_MODEL_ANY, X86_FEATURE_ANY, 0 }, { X86_VENDOR_AMD, 0x16, X86_MODEL_ANY, X86_FEATURE_ANY, 0 }, { X86_VENDOR_AMD, 0x17, X86_MODEL_ANY, X86_FEATURE_ANY, 0 }, + { X86_VENDOR_HYGON, 0x18, X86_MODEL_ANY, X86_FEATURE_ANY, 0 }, { } }; MODULE_DEVICE_TABLE(x86cpu, amd64_cpuids); diff --git a/drivers/edac/mce_amd.c b/drivers/edac/mce_amd.c index 2ab4d61..c605089 100644 --- a/drivers/edac/mce_amd.c +++ b/drivers/edac/mce_amd.c @@ -1059,7 +1059,8 @@ static int __init mce_amd_init(void) { struct cpuinfo_x86 *c = &boot_cpu_data; - if (c->x86_vendor != X86_VENDOR_AMD) + if (c->x86_vendor != X86_VENDOR_AMD && + c->x86_vendor != X86_VENDOR_HYGON) return -ENODEV; fam_ops = kzalloc(sizeof(struct amd_decoder_ops), GFP_KERNEL); @@ -1113,6 +1114,7 @@ static int __init mce_amd_init(void) break; case 0x17: + case 0x18: xec_mask = 0x3f; if (!boot_cpu_has(X86_FEATURE_SMCA)) { printk(KERN_WARNING "Decoding supported only on Scalable MCA processors.\n"); -- 2.7.4