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[209.85.221.170]) by smtp.gmail.com with ESMTPSA id m197-v6sm62517vkh.14.2018.09.26.15.23.40 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 26 Sep 2018 15:23:40 -0700 (PDT) Received: by mail-vk1-f170.google.com with SMTP id j14-v6so136062vke.8 for ; Wed, 26 Sep 2018 15:23:40 -0700 (PDT) X-Received: by 2002:a1f:e86:: with SMTP id 128-v6mr2444841vko.4.1538000619968; Wed, 26 Sep 2018 15:23:39 -0700 (PDT) MIME-Version: 1.0 References: <20180926205204.184898-1-ryandcase@chromium.org> In-Reply-To: <20180926205204.184898-1-ryandcase@chromium.org> From: Doug Anderson Date: Wed, 26 Sep 2018 15:23:28 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v3 1/2] dt-bindings: spi: Qualcomm Quad SPI(QSPI) documentation To: ryandcase@chromium.org Cc: Mark Brown , Randy Dunlap , Stephen Boyd , linux-arm-msm , Trent Piepho , boris.brezillon@bootlin.com, Girish Mahadevan , devicetree@vger.kernel.org, LKML , linux-spi , Rob Herring , Mark Rutland Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On Wed, Sep 26, 2018 at 1:54 PM Ryan Case wrote: > > From: Girish Mahadevan > > Bindings for Qualcomm Quad SPI used on SoCs such as sdm845. > > Signed-off-by: Girish Mahadevan > Signed-off-by: Ryan Case > --- > > Changes in v3: > - Added generic compatible string in addition to specific SoC > > Changes in v2: > - Added commit text > - Removed invalid property > - Updated example to match sdm845 with attached spi-nor > > .../bindings/spi/qcom,spi-qcom-qspi.txt | 36 +++++++++++++++++++ > 1 file changed, 36 insertions(+) > create mode 100644 Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.txt This looks good to me and change in v3 to add the SoC-specific string in addition to the more generic string identifying the IP block version matches my understanding of the correct things to do (as discussed in the v2 patch). Reviewed-by: Douglas Anderson