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[209.132.180.67]) by mx.google.com with ESMTP id i82-v6si2616780pfj.190.2018.09.27.10.03.12; Thu, 27 Sep 2018 10:03:28 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728347AbeI0XVi (ORCPT + 99 others); Thu, 27 Sep 2018 19:21:38 -0400 Received: from terminus.zytor.com ([198.137.202.136]:49089 "EHLO terminus.zytor.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727338AbeI0XVi (ORCPT ); Thu, 27 Sep 2018 19:21:38 -0400 Received: from terminus.zytor.com (localhost [127.0.0.1]) by terminus.zytor.com (8.15.2/8.15.2) with ESMTPS id w8RH29Qj099896 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Thu, 27 Sep 2018 10:02:10 -0700 Received: (from tipbot@localhost) by terminus.zytor.com (8.15.2/8.15.2/Submit) id w8RH29jh099893; Thu, 27 Sep 2018 10:02:09 -0700 Date: Thu, 27 Sep 2018 10:02:09 -0700 X-Authentication-Warning: terminus.zytor.com: tipbot set sender to tipbot@zytor.com using -f From: tip-bot for Pu Wen Message-ID: Cc: bp@suse.de, hpa@zytor.com, linux-kernel@vger.kernel.org, mingo@kernel.org, puwen@hygon.cn, tglx@linutronix.de Reply-To: mingo@kernel.org, puwen@hygon.cn, bp@suse.de, hpa@zytor.com, linux-kernel@vger.kernel.org, tglx@linutronix.de In-Reply-To: <8246f81648d014601de3812ade40e85d9c50d9b3.1537533369.git.puwen@hygon.cn> References: <8246f81648d014601de3812ade40e85d9c50d9b3.1537533369.git.puwen@hygon.cn> To: linux-tip-commits@vger.kernel.org Subject: [tip:x86/cpu] x86/cpu/mtrr: Support TOP_MEM2 and get MTRR number Git-Commit-ID: 39dc6f154dac134e4612827cb5283934c1862cb8 X-Mailer: tip-git-log-daemon Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline X-Spam-Status: No, score=-0.9 required=5.0 tests=ALL_TRUSTED,BAYES_00, DATE_IN_FUTURE_24_48 autolearn=no autolearn_force=no version=3.4.1 X-Spam-Checker-Version: SpamAssassin 3.4.1 (2015-04-28) on terminus.zytor.com Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Commit-ID: 39dc6f154dac134e4612827cb5283934c1862cb8 Gitweb: https://git.kernel.org/tip/39dc6f154dac134e4612827cb5283934c1862cb8 Author: Pu Wen AuthorDate: Sun, 23 Sep 2018 17:34:16 +0800 Committer: Borislav Petkov CommitDate: Thu, 27 Sep 2018 18:28:57 +0200 x86/cpu/mtrr: Support TOP_MEM2 and get MTRR number The Hygon Dhyana CPU has a special MSR way to force WB for memory >4GB, and support TOP_MEM2. Therefore, it is necessary to add Hygon Dhyana support in amd_special_default_mtrr(). The number of variable MTRRs for Hygon is 2 as AMD's. Signed-off-by: Pu Wen Signed-off-by: Borislav Petkov Reviewed-by: Borislav Petkov Cc: tglx@linutronix.de Cc: mingo@redhat.com Cc: hpa@zytor.com Cc: x86@kernel.org Cc: thomas.lendacky@amd.com Link: https://lkml.kernel.org/r/8246f81648d014601de3812ade40e85d9c50d9b3.1537533369.git.puwen@hygon.cn --- arch/x86/kernel/cpu/mtrr/cleanup.c | 3 ++- arch/x86/kernel/cpu/mtrr/mtrr.c | 2 +- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/x86/kernel/cpu/mtrr/cleanup.c b/arch/x86/kernel/cpu/mtrr/cleanup.c index 765afd599039..3668c5df90c6 100644 --- a/arch/x86/kernel/cpu/mtrr/cleanup.c +++ b/arch/x86/kernel/cpu/mtrr/cleanup.c @@ -831,7 +831,8 @@ int __init amd_special_default_mtrr(void) { u32 l, h; - if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD) + if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD && + boot_cpu_data.x86_vendor != X86_VENDOR_HYGON) return 0; if (boot_cpu_data.x86 < 0xf) return 0; diff --git a/arch/x86/kernel/cpu/mtrr/mtrr.c b/arch/x86/kernel/cpu/mtrr/mtrr.c index 9a19c800fe40..507039c20128 100644 --- a/arch/x86/kernel/cpu/mtrr/mtrr.c +++ b/arch/x86/kernel/cpu/mtrr/mtrr.c @@ -127,7 +127,7 @@ static void __init set_num_var_ranges(void) if (use_intel()) rdmsr(MSR_MTRRcap, config, dummy); - else if (is_cpu(AMD)) + else if (is_cpu(AMD) || is_cpu(HYGON)) config = 2; else if (is_cpu(CYRIX) || is_cpu(CENTAUR)) config = 8;