Received: by 2002:ac0:a5a6:0:0:0:0:0 with SMTP id m35-v6csp557704imm; Fri, 28 Sep 2018 03:07:01 -0700 (PDT) X-Google-Smtp-Source: ACcGV60rQNlKAzqu+Bo4hanhYWhOa49fdKTZz232ONAb30vP3pf7G38F9E1w8pIBkM9iN9J0/qdb X-Received: by 2002:a63:2541:: with SMTP id l62-v6mr5076407pgl.343.1538129221032; Fri, 28 Sep 2018 03:07:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1538129221; cv=none; d=google.com; s=arc-20160816; b=QTE1BG9xxssMtURNPAJEN5qrWAvxKPntgvZ841g5DP5dlfEq2fDceeit8ENu/CebBS GeIjWaII8d5ylrH3kGmFo1yZadhoV5lfOA7em2FADNNRKYSK6PbXypdFchd4Uk8iKTvH /lFewyOdIwj9z0/EJaf9/a2VAK6gQnxHZsbtBBEhFtKRNbP7JwEkL9DK48FqgU5g524O OEF65Pldr0CO4vFn/FyZVfORzKQuJWqZ6AEaIDK450CBbhuhC22Xi96R/hPfzNZAFuVy j+Vtbxvf/XfDYcbAz5yHlkJffjavXG4p60xD2Z5a+cyOmTzqxeltwUZZt7jLovQmS0uM k55Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=VFg0KNy62YgbPDYr0qG8XT28ArciRHFDte2NDtEd/lM=; b=njjs8h9c5fbqXY7uliciIbhVjdvBcBaoVsKuK+ExF9DucEyOqe0Ru4hKtLvL+tTARU cRUile+98mwhhy+p97o4IjDEpryDRK2W7+eI7qfIXsQKvONM1b+G733uJBICZCf96brU asYB/r2zP8dyj5cK5iF0ZgmK+SSWbZ4+6aOyhCmGwFElw7eG+meMlDGOYRtcwWXmqkjC pr4Jk12TRisOcmej3nzPWM4fEWU8tMyFBVwSbHpTXXfyglebRlzpWifF7fLLHlvhOaw9 mk+m4ZF8dEbCeAkLWzeuXw/26o2GcvfnfSK0B8io86nwPnOOnpAh+BUk0ySfYjPE2bzz cfzg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id h16-v6si4262772plr.343.2018.09.28.03.06.45; Fri, 28 Sep 2018 03:07:00 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729389AbeI1Q15 (ORCPT + 99 others); Fri, 28 Sep 2018 12:27:57 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:62385 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1729333AbeI1Q1z (ORCPT ); Fri, 28 Sep 2018 12:27:55 -0400 X-UUID: 40f70a36181d4a17a67098141df29031-20180928 Received: from mtkcas09.mediatek.inc [(172.21.101.178)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1744052678; Fri, 28 Sep 2018 18:04:50 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs01n2.mediatek.inc (172.21.101.79) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 28 Sep 2018 18:04:48 +0800 Received: from localhost.localdomain (10.17.3.153) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Fri, 28 Sep 2018 18:04:47 +0800 From: To: , , , , , , CC: , , , , , , , , , Subject: [PATCH v5 6/9] PCI: mediatek: Enable msi after clock enabled Date: Fri, 28 Sep 2018 18:04:37 +0800 Message-ID: <1538129080-8206-7-git-send-email-honghui.zhang@mediatek.com> X-Mailer: git-send-email 2.6.4 In-Reply-To: <1538129080-8206-1-git-send-email-honghui.zhang@mediatek.com> References: <1538129080-8206-1-git-send-email-honghui.zhang@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-TM-SNTS-SMTP: D8223F1D09969A57176FA1E72EF699335B46AA4019E13A4D49B56E091B1765BB2000:8 X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Honghui Zhang The clocks was not enabled when enable MSI. This patch fix this issue by calling mtk_pcie_enable_msi in mtk_pcie_startup_port_v2 since the clock was all enabled at that time. Signed-off-by: Honghui Zhang --- drivers/pci/controller/pcie-mediatek.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/pci/controller/pcie-mediatek.c b/drivers/pci/controller/pcie-mediatek.c index d150be1..be38b38 100644 --- a/drivers/pci/controller/pcie-mediatek.c +++ b/drivers/pci/controller/pcie-mediatek.c @@ -572,8 +572,6 @@ static int mtk_pcie_init_irq_domain(struct mtk_pcie_port *port, ret = mtk_pcie_allocate_msi_domains(port); if (ret) return ret; - - mtk_pcie_enable_msi(port); } return 0; @@ -694,6 +692,9 @@ static int mtk_pcie_startup_port_v2(struct mtk_pcie_port *port) val &= ~INTX_MASK; writel(val, port->base + PCIE_INT_MASK); + if (IS_ENABLED(CONFIG_PCI_MSI)) + mtk_pcie_enable_msi(port); + /* Set AHB to PCIe translation windows */ size = mem->end - mem->start; val = lower_32_bits(mem->start) | AHB2PCIE_SIZE(fls(size)); -- 2.6.4