Received: by 2002:ac0:a5a6:0:0:0:0:0 with SMTP id m35-v6csp600563imm; Fri, 28 Sep 2018 03:53:47 -0700 (PDT) X-Google-Smtp-Source: ACcGV62NLu6KW0mx5kLvyBLXE8ldvT5Miz+d2aqbDMcTbBN3bUyVst3OdhP65m0qvxA4flnL1N+c X-Received: by 2002:a62:7788:: with SMTP id s130-v6mr16171820pfc.189.1538132027232; Fri, 28 Sep 2018 03:53:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1538132027; cv=none; d=google.com; s=arc-20160816; b=H2ID60INUW8nc3s/fSqYc4am6lIMlNh6HabnVuHI0oRF5i/SOcbGLsRzeU+y+nvbwx ue1C43BF4+YrDYihYplijy2JygIN4kBiZn2GMQ6PEy8h2ki0JpYU6AkoidSiWUSHDZwQ KL+GIxCGEo6Y7wyDDkCqtnrxNBko9Vk5OiaqT1DYnUnMhCjbrcWtUSs0TYWjpWzCtfnI iMcVOalvTt5thsuP45nG8OqqRLxJpdIEMv9BWqHWoIshSA2hnwo1BccS28KUebYEpDpv iFzd977JcDKHLYsCUvoA6YHE3ifZeO6mN690q16ZGBf7m8F9rd1zTczAoTYxULoIE0TZ rjNA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=sMH0Q2PLmtyxulpB2BttNomh9+BD828iI4vLg7dyYpQ=; b=xfEq9b3F+FWajtp/Av94vBbcnUYsW2B0gN040iS6AwQH3WWpipmkzDs6+rh+qrtz3H NWCuk0xBRC+nJHv68kgLqaYM5tt7u4/14S60GIQj6zlzDklqsuglyQc9iBFXoBITvTba jpT1NlCR3OuXlGkh2jZiCS8/mzhqQAGaoHkUsx/E4La1bu/nLtrqvvz/fjo/m8KxeD5q gRUXwyn+Y+MagWVPvWaxIHOlSDgkM+0zej+q/GB6xcap+woB+ZgLu85gY45ArxPaE4jZ yri7DawHfnwFHLDJTFI0fTfYd4aeSHCjdN4ETs3UtA3g4TDYjuUAkjzE4isU95n9CaJp Z04w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id n15-v6si3652300pgi.537.2018.09.28.03.53.30; Fri, 28 Sep 2018 03:53:47 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729478AbeI1RQ2 (ORCPT + 99 others); Fri, 28 Sep 2018 13:16:28 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:14718 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1729310AbeI1RQ1 (ORCPT ); Fri, 28 Sep 2018 13:16:27 -0400 X-UUID: be90f8d771334c3db861a54b8c98a000-20180928 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw01.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1764791174; Fri, 28 Sep 2018 18:53:12 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs01n1.mediatek.inc (172.21.101.68) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 28 Sep 2018 18:53:10 +0800 Received: from localhost.localdomain (10.17.3.153) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Fri, 28 Sep 2018 18:53:10 +0800 From: Leilk Liu To: Mark Brown CC: Mark Rutland , Matthias Brugger , Sascha Hauer , , , , , , , Leilk Liu Subject: [PATCH v5 3/3] arm64: dts: Add spi slave dts Date: Fri, 28 Sep 2018 18:53:05 +0800 Message-ID: <1538131985-9471-4-git-send-email-leilk.liu@mediatek.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1538131985-9471-1-git-send-email-leilk.liu@mediatek.com> References: <1538131985-9471-1-git-send-email-leilk.liu@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch adds MT2712 spi slave into device tree. Signed-off-by: Leilk Liu --- arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi index 75cc0f7..ee627a7 100644 --- a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi @@ -301,6 +301,17 @@ status = "disabled"; }; + spis1: spi@10013000 { + compatible = "mediatek,mt2712-spi-slave"; + reg = <0 0x10013000 0 0x100>; + interrupts = ; + clocks = <&infracfg CLK_INFRA_AO_SPI1>; + clock-names = "spi"; + assigned-clocks = <&topckgen CLK_TOP_SPISLV_SEL>; + assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL1_D2>; + status = "disabled"; + }; + apmixedsys: syscon@10209000 { compatible = "mediatek,mt2712-apmixedsys", "syscon"; reg = <0 0x10209000 0 0x1000>; -- 1.7.9.5