Received: by 2002:ac0:a5a6:0:0:0:0:0 with SMTP id m35-v6csp650707imm; Fri, 28 Sep 2018 04:43:27 -0700 (PDT) X-Google-Smtp-Source: ACcGV616OwCVuROPhonZDCNFhAGvupuBB4nj9XPm1c0poHaPQHn/nijXQ8cHq4zNCQ3i4XAoYFpV X-Received: by 2002:a62:401:: with SMTP id 1-v6mr16406821pfe.28.1538135007786; Fri, 28 Sep 2018 04:43:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1538135007; cv=none; d=google.com; s=arc-20160816; b=KbXkrYPcueJXgoule7slNq+RuF94/wPPwTFWVDxyd1I8FMwLyugPTnfLfCyzHWu81M PdCZz0QNhAQrf3FwBpqb9Dj3nYoVdaP3V3rYiM3AUn1V1zzYfFaAMMyPb9FGX4br3MEu s+ADUtfjn3SpFpGA2HJfn6OW8r6bhJMkcmPZ53mqQX1jcUbGgDJIeY+rJCarmzTadjhE gJ2wbyqHzMcaldo+40Cz3kkDDUqo+PeotHJ0TpHwjL9pyEzRnL6NFEOvmtVae9/iLrDI oHsDeB8HKEtPWXxQtu1ItHi5yidZhUSN44I8Qrrkl9/wQi0ktdz7C9aArsxSh+kSXz/d 89Zw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=Ak5kUwcqqvIMkTRUvDJFHXTbnhybYLkYLT2jQMnYK+c=; b=QK0R/4D7PbaekUEuwaS5Ayr75dBLPJtsVihiDfIFBEL3lq4GEDbnRYU8rz/d5q+xGW Xc9IuipyzU65pw5EAN5CX8H7yM3t2uynJdQvg3yq0A9K1X5BYHvClNseJRIZktPDpCun CXtd3MJ1AsR9gwYVA7ySPvP5PnGFMCv1RPp37CTAjtKVZqeXtXdfGuke+XJZZlWSwB0I 0Jst1gVaaS1lR/DRwKaeifrJI82S2pcLLZfssXZczcVabf5vguxRUpI4hp02h7osY7Aj 5GaCzmhnd9PslU9cK7CQUKVQKbjIj5/iuzra/NiGItTodVu2xHdArWeRlGNMyTI6InUU 0HbA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id r9-v6si4969467pli.248.2018.09.28.04.43.12; Fri, 28 Sep 2018 04:43:27 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729585AbeI1SEg (ORCPT + 99 others); Fri, 28 Sep 2018 14:04:36 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:2974 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1729291AbeI1SEf (ORCPT ); Fri, 28 Sep 2018 14:04:35 -0400 X-UUID: d06dab89507f46deb404b02846c0ef61-20180928 Received: from mtkcas06.mediatek.inc [(172.21.101.30)] by mailgw01.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1582751188; Fri, 28 Sep 2018 19:41:08 +0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs08n2.mediatek.inc (172.21.101.56) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 28 Sep 2018 19:41:07 +0800 Received: from localhost.localdomain (10.17.3.153) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Fri, 28 Sep 2018 19:41:06 +0800 From: Chaotian Jing To: Ulf Hansson CC: Rob Herring , Mark Rutland , Matthias Brugger , Chaotian Jing , Ryder Lee , Wolfram Sang , Sean Wang , , , , , , Subject: [PATCH 1/2] mmc: dt-bindings: add "bus-clk" for MT2712 Date: Fri, 28 Sep 2018 19:40:54 +0800 Message-ID: <1538134855-11198-2-git-send-email-chaotian.jing@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty In-Reply-To: <1538134855-11198-1-git-send-email-chaotian.jing@mediatek.com> References: <1538134855-11198-1-git-send-email-chaotian.jing@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-TM-SNTS-SMTP: BD2BA4FAB09AEFF03070861B05D9FC1C74481E4045F833CA18D03D228657BFC72000:8 X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On MT2712 MSDC0/3, HCLK/bus-clk need gate/ungate together, or will hang when access MSDC register. Signed-off-by: Chaotian Jing --- Documentation/devicetree/bindings/mmc/mtk-sd.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.txt b/Documentation/devicetree/bindings/mmc/mtk-sd.txt index f33467a..182299b 100644 --- a/Documentation/devicetree/bindings/mmc/mtk-sd.txt +++ b/Documentation/devicetree/bindings/mmc/mtk-sd.txt @@ -22,6 +22,7 @@ Required properties: "source" - source clock (required) "hclk" - HCLK which used for host (required) "source_cg" - independent source clock gate (required for MT2712) + "bus_clk" - bus clk used for internal register access(required for MT2712 MSDC0/3) - pinctrl-names: should be "default", "state_uhs" - pinctrl-0: should contain default/high speed pin ctrl - pinctrl-1: should contain uhs mode pin ctrl -- 1.8.1.1.dirty