Received: by 2002:ac0:a5a6:0:0:0:0:0 with SMTP id m35-v6csp1447111imm; Fri, 28 Sep 2018 19:30:35 -0700 (PDT) X-Google-Smtp-Source: ACcGV63PGre2vOUfFoa+cqBTv0JbauktAsiY0M4WRAFVuxQvZpo7wsN6dCYAKyET58pHASVt/oQx X-Received: by 2002:a17:902:c6:: with SMTP id a64-v6mr1272455pla.180.1538188235579; Fri, 28 Sep 2018 19:30:35 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1538188235; cv=none; d=google.com; s=arc-20160816; b=VCVPOkxvA7vGHA6Pa9Y6Za5GrCKueM40MISQilG28m8OKGsghUYbYOtCHKzeZaBPFg gMre6XIZdVSUQYNHOM4MaZe9u2zcOmFCjz1wckHkl9Zv7S5IS76w0XOic7Ap8oO4VgqH 4dfGrna3KRqfgXpTPSSB/FqKVQnWIRaNL/Y5ErN6oFLXeZvxN+glW67Brs2CdKh8YMD9 wq8dj0bBouzSgrYcm8z4aesxsNKAcAov2tEWeQgSfbpStMympajisD1V2HMxapLjx+4l yp7Gi9KaTEkfqaW0a5VBKE1DWtLbGfBErNo8cPhmm6ny9PgmMa+OWgJy0ZvcOhQJn+nn 2lOA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:message-id:date:subject:cc :to:from; bh=364NgmdQYAekoVtRGaJ5dwjYvs1ZCsW7loLGBGa80EY=; b=wtjth3C1bluZYCoAExFkepCChynusL1Tou3IIU1jjVrq+SxGN35RxA4rgLaotzfpxH RWmVW9kt1/CwTuPZ8eCR8ef67tNq1lxZGOlFL0531c++fGW5ocssWoONyQYDHdL9QoPP ipDpDljLJc06Ox8RpuAg1JWfs5uO2289OAqgNnoijcq+DIMKvRDtcrFKH0K+tm+6R+C8 TH42H2kJ1U9asbBI6JHTshkEKjgjn4j4RLRshfN5XdJSAGKnRrduXQImKHJnwVOsML/Q gs5ecl9OenRSyoiEdas9ELKe/YUiaWd5ST/rfBXuWXbV1RM0ZRPC3jjOQVZ9sTBg63sT snvg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z2-v6si6366961pgb.247.2018.09.28.19.30.21; Fri, 28 Sep 2018 19:30:35 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727425AbeI2I4r (ORCPT + 99 others); Sat, 29 Sep 2018 04:56:47 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:28405 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726325AbeI2I4r (ORCPT ); Sat, 29 Sep 2018 04:56:47 -0400 X-UUID: 7a10b456fc984ea8800bababfa563445-20180929 Received: from mtkcas07.mediatek.inc [(172.21.101.84)] by mailgw01.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1904570835; Sat, 29 Sep 2018 10:30:01 +0800 Received: from mtkcas09.mediatek.inc (172.21.101.178) by mtkmbs03n1.mediatek.inc (172.21.101.181) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Sat, 29 Sep 2018 10:30:00 +0800 Received: from localhost.localdomain (10.17.3.153) by mtkcas09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Sat, 29 Sep 2018 10:29:59 +0800 From: Chaotian Jing To: Ulf Hansson CC: Rob Herring , Mark Rutland , Matthias Brugger , Chaotian Jing , Ryder Lee , Wolfram Sang , Sean Wang , , , , , , Subject: [PATCH v1 1/2] mmc: dt-bindings: add "bus-clk" for MT2712 Date: Sat, 29 Sep 2018 10:29:54 +0800 Message-ID: <1538188195-3608-1-git-send-email-chaotian.jing@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On MT2712 MSDC0/3, HCLK/bus-clk need gate/ungate together, or will hang when access MSDC register. Signed-off-by: Chaotian Jing --- Documentation/devicetree/bindings/mmc/mtk-sd.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.txt b/Documentation/devicetree/bindings/mmc/mtk-sd.txt index f33467a..f2208f4 100644 --- a/Documentation/devicetree/bindings/mmc/mtk-sd.txt +++ b/Documentation/devicetree/bindings/mmc/mtk-sd.txt @@ -22,6 +22,7 @@ Required properties: "source" - source clock (required) "hclk" - HCLK which used for host (required) "source_cg" - independent source clock gate (required for MT2712) + "bus_clk" - bus clock used for internal register access (required for MT2712 MSDC0/3) - pinctrl-names: should be "default", "state_uhs" - pinctrl-0: should contain default/high speed pin ctrl - pinctrl-1: should contain uhs mode pin ctrl -- 1.8.1.1.dirty