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Received: from [223.237.19.35] (port=14204 helo=[192.168.43.180]) by server153.web-hosting.com with esmtpsa (TLSv1.2:ECDHE-RSA-AES128-GCM-SHA256:128) (Exim 4.91) (envelope-from ) id 1g6tGi-000iUe-P5; Mon, 01 Oct 2018 04:09:36 -0400 Subject: Re: [linux-sunxi] Re: [PATCH 06/12] drm/sun4i: sun6i_mipi_dsi: Fix VBP size calculation To: maxime.ripard@bootlin.com, Jagan Teki Cc: Chen-Yu Tsai , Icenowy Zheng , Jernej Skrabec , Vasily Khoruzhick , Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , David Airlie , dri-devel , Michael Turquette , Stephen Boyd , linux-clk , Michael Trimarchi , linux-arm-kernel , devicetree , linux-kernel , linux-sunxi References: <20180927114850.24565-1-jagan@amarulasolutions.com> <20180927114850.24565-7-jagan@amarulasolutions.com> <20180927152126.vovnvwmqdfpuxgdm@flea> <20180929135302.ymdzapz5npvapti2@flea> From: Jagan Teki Message-ID: <63b40c20-670b-1c53-bf5e-62f64e6e02f0@openedev.com> Date: Mon, 1 Oct 2018 13:39:17 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 MIME-Version: 1.0 In-Reply-To: <20180929135302.ymdzapz5npvapti2@flea> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-OutGoing-Spam-Status: No, score=-1.0 X-Originating-IP: 68.65.123.203 X-SpamExperts-Domain: nctest.net X-SpamExperts-Username: whmcalls3 Authentication-Results: registrar-servers.com; auth=pass (login) smtp.auth=whmcalls3@nctest.net X-SpamExperts-Outgoing-Class: ham X-SpamExperts-Outgoing-Evidence: Combined (0.04) X-Recommended-Action: accept X-Filter-ID: EX5BVjFpneJeBchSMxfU5hQobFtKNA//mjbleNTKjz1602E9L7XzfQH6nu9C/Fh9KJzpNe6xgvOx q3u0UDjvO0Ma0zdKrj2HeYAO9pcN4rBgaa/6KAnDjbDW9Kfk8S67rc0diZKnmpMa4igsMUptb3ws 3TRjaC42FtNJuTWwh7zDil9nzpwm+X/neb6NqWhvt8C9mOBdONdnsxgsk1D2p81t61bzOH+dRuda OCHhfvkbONHJki/bT3w/adEN9DqaPbFM3vei53Yyp3v779HcSLG62plOzR5DsoLGZCSqoE3JNAYC 28t8cR5ITCXTcZqmvaqpXrmasHx4eiR7j6vX9B9laqTmco/p+9en7IdA6p9E/g67cwxyIR8VmA5e WtNvnSJzSMipXLKj208wF0l+/LRpsq1uynJlGc1wGBNxKAasUDAM310p3PNWWaIaSygi7PgEVsGe cFro/0JGrOyRSaDNUgpG8fAJ7Lg21L451C+Y73wey0WZIByhkSafuhnLcy3brt7kvrJyGkSOIbze Phts3vFtUDOwEYF9reFkRh1Z2XmZE6Ulo3Sg6/fHCWNx01dKq9doQCQL/RyDC8HpXAynucv4rnju YPOfZh8jslwg7QT+iN5/VyfWKR5edUF17qyCLW5GY4F23J7eq8SL0BtM8UT3jCT30WOGa77ANY69 cBNhkoiRE9GgA7DbpeRaXeO0Hg/cLwycMnvIieVWIs4dJKDqjPjhvPjqAjKg6VeiSiHqKnOM6HUc 1C6txUOgA50Rgoi231VkAC4d/u07DCMMQ72GN0COt/Z36GxUDe1/x2bFJS+Hj6rj4u8HaEmUvqOm FuO+t4VfdYX5HF0Jd/Quc8Wou4TIK4Bcb6TQCr94GXpVQ2KwGtu81JXrQcgqRYMJqVDlz3D3q3rG z4wpqXduuWzX2YNPcyspnKOz/GpVtBEI/lNmY9JL/ej0hsKuKmLtSOgDyocRXs5/Dj5QrbiOquAw kPRjlgIoLaXIRRdYY1xob1S/a4Rw9BKeg+GlaQRG0qurVqDgRPCOBb4ws+nK6Hdu5ythdss+87CL YnNBoGfS0DhK3BfvFNI4fRpBbmGFHU0Fd1FYwiLqVhSu3v+nCpyCSdscG09FH1xvLyyjtb2gYbxM T6+Iy9pOFZK275ou5bBvQX3uElphnHsYcHZLfQ+dkTJQ3t6fkiyQeQV6EipRzMVZ5LqwTx7Vvn9S VCuiP+10HNhHuWYhdKNkJvfZdFJiZZPY9MnZD1O5yq0pWWScINzg4dgw5iDGlYGqF8vXDOId4ZvF xjFOs0DvEGYfBtA7NQTMLOZX0MM27/fUsuiVMUz2osEFaYRxsB6RP1WtefrqFnxOMi6sKMFKy5Lq LFUIM7si3XKl+gouHE7VOEtHO7BXRk+kb0Ie3l6uI43eRHGnZHBV/yCqCu6qSGtTjyILXkKxOPov txRJN5kteXJGNpNt4GbSsOU/9v/KnSUfEaFbXfx3YmWV3Eu1dd5T48p+m8Gi9mpWQ6cJTOhMhoTy AjQts04eAyoaGqs2BxWyJ5iZ/mYkQw5Sva7E5XuqpjkxjsxX7/OU+X56MDbCOXzqrgeRjh9HHXX0 2BXFZ0oSYx0xwIlnSxHDnJq+tjf1ariSumYaswHs71h51UM9FqN9xH7aeMYHGsZ/4QaVkaMLBQ2N o2eCxS3UTYtuZQ== X-Report-Abuse-To: spam@se16.registrar-servers.com Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Saturday 29 September 2018 07:23 PM, Maxime Ripard wrote: > On Thu, Sep 27, 2018 at 09:50:34PM +0530, Jagan Teki wrote: >> On Thu, Sep 27, 2018 at 8:51 PM Maxime Ripard wrote: >>> >>> On Thu, Sep 27, 2018 at 05:18:44PM +0530, Jagan Teki wrote: >>>> According to horizontal and vertical timings are defined >>>> per the diagram from include/drm/drm_modes.h >>>> >>>> Back porch = [hv]total - [hv]sync_end >>>> >>>> So, update SUN6I_DSI_BASIC_SIZE0_VBP calculation as >>>> mode->vtotal - mode->vsync_end >>>> >>>> Signed-off-by: Jagan Teki >>>> --- >>>> drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 4 ++-- >>>> 1 file changed, 2 insertions(+), 2 deletions(-) >>>> >>>> diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c >>>> index 1c7e42015645..599284971ab6 100644 >>>> --- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c >>>> +++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c >>>> @@ -526,8 +526,8 @@ static void sun6i_dsi_setup_timings(struct sun6i_dsi *dsi, >>>> regmap_write(dsi->regs, SUN6I_DSI_BASIC_SIZE0_REG, >>>> SUN6I_DSI_BASIC_SIZE0_VSA(mode->vsync_end - >>>> mode->vsync_start) | >>>> - SUN6I_DSI_BASIC_SIZE0_VBP(mode->vsync_start - >>>> - mode->vdisplay)); >>>> + SUN6I_DSI_BASIC_SIZE0_VBP(mode->vtotal - >>>> + mode->vsync_end)); >>> >>> Is it purely theoretical, or did you find some source that back that? >> >> VSA is done as per that, sync_end - sync start would give sync time. > > That's a different register though. > >> VBP also done in BPI-M64-bsp[1] which results back porch existing code >> results fron porch. >> >> [1] https://github.com/BPI-SINOVOIP/BPI-M64-bsp/blob/master/linux-sunxi/drivers/video/sunxi/disp2/disp/de/lowlevel_sun50iw1/de_dsi.c#L955 > > That code does back porch - sync length. Such a calculation doesn't > make much sense as is, but you're saying that it results in the front > porch. Again, what makes you say that? No what code shows is not a real back porch value used for drm it's panel back porch value which is a DTS property in BSP. (I made wrong comment on previous mail as front porch, sorry) here is the real code from drivers/video/sunxi/disp2/disp/de/disp_lcd.c timmings->ver_sync_time= panel_info->lcd_vspw; timmings->ver_back_porch= panel_info->lcd_vbp-panel_info->lcd_vspw; u32 vbp = panel->lcd_vbp; u32 vspw = panel->lcd_vspw; dsi_dev[sel]->dsi_basic_size0.bits.vbp = vbp-vspw; So, dsi_dev[sel]->dsi_basic_size0.bits.vbp = panel->lcd_vbp - panel->lcd_vspw; => timmings->ver_back_porch + panel_info->lcd_vspw - panel_info->lcd_vspw => timmings->ver_back_porch => mode->vtotal - mode->end VSA, which a proper value. dsi_dev[sel]->dsi_basic_size0.bits.vsa = vspw; => panel_info->lcd_vspw; => timmings->ver_sync_time => mode->vsync_end - mode->vsync_start