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[209.132.180.67]) by mx.google.com with ESMTP id g7-v6si12410690pll.360.2018.10.01.06.12.19; Mon, 01 Oct 2018 06:12:34 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729282AbeJATsT (ORCPT + 99 others); Mon, 1 Oct 2018 15:48:19 -0400 Received: from relmlor3.renesas.com ([210.160.252.173]:58752 "EHLO relmlie2.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1728979AbeJATsT (ORCPT ); Mon, 1 Oct 2018 15:48:19 -0400 Received: from unknown (HELO relmlir1.idc.renesas.com) ([10.200.68.151]) by relmlie2.idc.renesas.com with ESMTP; 01 Oct 2018 22:10:32 +0900 Received: from relmlii1.idc.renesas.com (relmlii1.idc.renesas.com [10.200.68.65]) by relmlir1.idc.renesas.com (Postfix) with ESMTP id 1BCAB7FA93; Mon, 1 Oct 2018 22:10:32 +0900 (JST) X-IronPort-AV: E=Sophos;i="5.54,327,1534777200"; d="scan'208";a="292407159" Received: from unknown (HELO vbox.ree.adwin.renesas.com) ([10.226.37.67]) by relmlii1.idc.renesas.com with ESMTP; 01 Oct 2018 22:10:29 +0900 From: Phil Edworthy To: Geert Uytterhoeven , Laurent Pinchart , Rob Herring , Mark Rutland Cc: Jacopo Mondi , Linus Walleij , Simon Horman , linux-gpio@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Phil Edworthy , devicetree@vger.kernel.org Subject: [PATCH v7 0/3] Renesas R9A06G032 PINCTRL Driver Date: Mon, 1 Oct 2018 14:10:23 +0100 Message-Id: <20181001131026.14635-1-phil.edworthy@renesas.com> X-Mailer: git-send-email 2.17.1 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This implements the pinctrl driver for the RZ/N1 family of devices, including the R9A06G032 (RZ/N1D) device. This series was originally written by Michel Pollet whilst at Renesas, and I have taken over this work. Main changes: v7: - Revert changes in v6, and just remove the token pasting v6: - Instead of combining the pin nr and func into a single element, use a pair of 8-bit elements. - Simplified how the MDIO function is calculated v5: - Address Jacopo's further comments - Address Geert's comments v4: - Address Jacopo's comments - Add alternative way to use the pinmux prop. - Remove mention of gpios. - Implement pin_config_group_get() - Fix function to get pin configs, i.e. return -EINVAL when disabled. v3: - Use standard DT props instead of proprietary ones. - Replace virtual pins used for MDIO muxing with extra funcs. - Use pinctrl_utils funcs to handle the maps. - Remove the dbg functions to keep things simple. - Change the way the functions are defined so it is easy to check against the hardware numbering. v2: - Change to generic rzn1 family driver, instead of device specific. - Review comments fixed. - Fix error handling during probe Phil Edworthy (3): dt-bindings: pinctrl: renesas,rzn1-pinctrl: documentation pinctrl: renesas: Renesas RZ/N1 pinctrl driver ARM: dts: r9a06g032: Add pinctrl node .../bindings/pinctrl/renesas,rzn1-pinctrl.txt | 153 +++ arch/arm/boot/dts/r9a06g032.dtsi | 8 + drivers/pinctrl/Kconfig | 10 + drivers/pinctrl/Makefile | 1 + drivers/pinctrl/pinctrl-rzn1.c | 948 ++++++++++++++++++ include/dt-bindings/pinctrl/rzn1-pinctrl.h | 141 +++ 6 files changed, 1261 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.txt create mode 100644 drivers/pinctrl/pinctrl-rzn1.c create mode 100644 include/dt-bindings/pinctrl/rzn1-pinctrl.h -- 2.17.1