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[5.150.229.118]) by smtp.gmail.com with ESMTPSA id 24-v6sm2910948ljb.76.2018.10.01.12.34.15 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 01 Oct 2018 12:34:16 -0700 (PDT) Date: Mon, 1 Oct 2018 21:34:14 +0200 From: Niklas Cassel To: Stephen Boyd Cc: Linus Walleij , linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-arm-msm@vger.kernel.org, Bjorn Andersson , Doug Anderson Subject: Re: [PATCH v3 0/3] pinctrl: msm interrupt and muxing fixes Message-ID: <20181001193414.GA4441@centauri.lan> References: <20180816200648.90458-1-swboyd@chromium.org> <20180912103431.GA27204@centauri.ideon.se> <153841961783.119890.13486677118739554119@swboyd.mtv.corp.google.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <153841961783.119890.13486677118739554119@swboyd.mtv.corp.google.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Oct 01, 2018 at 11:46:57AM -0700, Stephen Boyd wrote: > Quoting Niklas Cassel (2018-09-12 03:34:31) > > Hello Stephen, > > > > I'm getting this warning on dragonboard 820c (msm8996) when booting linux-next: > > > > [ 3.211575] WARNING: CPU: 1 PID: 1 at drivers/pinctrl/qcom/pinctrl-msm.c:164 msm_pinmux_set_mux+0xc8/0x150 > > [ 3.212127] l28: ramp_delay not set > > Thanks for testing. I think the problem is I messed up the function 0 > and enum 0. Can you try this patch? Hello Stephen, This patch does indeed remove the warning. Thanks! Kind regards, Niklas > > --8<--- > diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c > index 1684b2da09d5..b925b8feac95 100644 > --- a/drivers/pinctrl/qcom/pinctrl-msm.c > +++ b/drivers/pinctrl/qcom/pinctrl-msm.c > @@ -188,7 +188,7 @@ static int msm_pinmux_request_gpio(struct pinctrl_dev *pctldev, > return 0; > > /* For now assume function 0 is GPIO because it always is */ > - return msm_pinmux_set_mux(pctldev, 0, offset); > + return msm_pinmux_set_mux(pctldev, g->funcs[0], offset); > } > > static const struct pinmux_ops msm_pinmux_ops = {