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[209.132.180.67]) by mx.google.com with ESMTP id q9-v6si11357204pfk.27.2018.10.02.03.57.35; Tue, 02 Oct 2018 03:57:49 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=cirrus.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727519AbeJBRiq (ORCPT + 99 others); Tue, 2 Oct 2018 13:38:46 -0400 Received: from mx0a-001ae601.pphosted.com ([67.231.149.25]:35832 "EHLO mx0b-001ae601.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726244AbeJBRiq (ORCPT ); Tue, 2 Oct 2018 13:38:46 -0400 Received: from pps.filterd (m0077473.ppops.net [127.0.0.1]) by mx0a-001ae601.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w92Au3m1007749; Tue, 2 Oct 2018 05:56:04 -0500 Authentication-Results: ppops.net; spf=none smtp.mailfrom=ckeepax@opensource.cirrus.com Received: from mail4.cirrus.com ([87.246.98.35]) by mx0a-001ae601.pphosted.com with ESMTP id 2mugjdhmm4-1; Tue, 02 Oct 2018 05:56:03 -0500 Received: from EX17.ad.cirrus.com (unknown [172.20.9.81]) by mail4.cirrus.com (Postfix) with ESMTP id D7699611C8BE; Tue, 2 Oct 2018 05:58:37 -0500 (CDT) Received: from imbe.wolfsonmicro.main (198.61.95.81) by EX17.ad.cirrus.com (172.20.9.81) with Microsoft SMTP Server id 14.3.408.0; Tue, 2 Oct 2018 11:56:02 +0100 Received: from imbe.wolfsonmicro.main (imbe.wolfsonmicro.main [198.61.95.81]) by imbe.wolfsonmicro.main (8.14.4/8.14.4) with ESMTP id w92Au21e023514; Tue, 2 Oct 2018 11:56:02 +0100 Date: Tue, 2 Oct 2018 11:56:02 +0100 From: Charles Keepax To: Richard Fitzgerald CC: , , Subject: Re: [PATCH v2 2/2] mfd: madera: Wait for BOOT_DONE before reading device ID Message-ID: <20181002105602.GS1653@imbe.wolfsonmicro.main> References: <20181002104134.29003-1-rf@opensource.cirrus.com> <20181002104134.29003-2-rf@opensource.cirrus.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20181002104134.29003-2-rf@opensource.cirrus.com> User-Agent: Mutt/1.5.20 (2009-12-10) X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=941 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1807170000 definitions=main-1810020109 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Oct 02, 2018 at 11:41:34AM +0100, Richard Fitzgerald wrote: > It isn't safe to read the device ID in the SOFTWARE_RESET > register until the silicon boot sequence has completed. This > patch rearranges the code to wait until BOOT_DONE is set. > > If we don't have a hard reset line we want to defer writing a > soft reset command until we have identified the silicon as > something we recognize. As the BOOT_DONE bit is sticky it is > safe to wait for it without issuing a soft reset first, because > the most recent power-up will have caused a boot sequence and > set the bit. Note that the boot sequence is not the same as a > reset so we still have to soft reset to get the codec into a > known state. > > Signed-off-by: Stuart Henderson > Signed-off-by: Richard Fitzgerald > --- Reviewed-by: Charles Keepax Thanks, Charles