Received: by 2002:ac0:a582:0:0:0:0:0 with SMTP id m2-v6csp1235718imm; Tue, 2 Oct 2018 05:11:19 -0700 (PDT) X-Google-Smtp-Source: ACcGV62NLl7/c+J4Gn3ZPKTkHn8P3rUjXzIsO7vCSrc3zvMjfe8+RSsAzm/E+4TU2NFZeHasbG8I X-Received: by 2002:a63:2d43:: with SMTP id t64-v6mr14368011pgt.128.1538482279603; Tue, 02 Oct 2018 05:11:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1538482279; cv=none; d=google.com; s=arc-20160816; b=lBnHwLI5qBHL337bOgz3Uln9BP9Ln7t9ayJ9mGZ1xQZD8fC+W6QvSpqXDfou1GeCot AMunHKMlse4Kg7VSB0T2djoUZWGsLpBtEw6bS71vGh074pgubxNMnaTd5jv2Ymvso3rE wffI3moGDef1OmzH3r5S1nUQzW/syHkEeS/hxOou+/qVeicFI1S3eeiGbLk6d4iQTtZk MvALtNmGm+NLyDS8WOthZkaVdHbq7BOo/yotsLKz15NToRU+k6mfTO4pxGD71z6CXiuG 1WgzA1Fas2pKUbT38qUYu4Duwz3auyTdvMmFTvFllzFYkeLZ7jO7OFvdOfLW4DEFLCg5 z+qA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=/+qrZytL7tmZnLoz5xtOOvkUwIT77OaZgLl4e0Tc6HI=; b=xdPnWs7kJthLFpzBJeG7h6lJ1CJpETQWATHJQrDdZ07KZ1w01QoWT0+Wfql7XRxRT3 vqD5zOLkopDt4ZeSwPmvpr/vLQ2EJCeF1PCIvk97GrR5lWYCEreqWCqHlJjgHCgXZWhZ 6ZdWhBuWeKT2sIHQhuiu2cQfnwjAbGind0AO/SQBCxLu7A3MPxgZEHLNUxaMJ2Gz/36h WvqgfvPfYvGNi5YsdSOIkCa4D35yXjtTUxhEmmHAXNunRUWiNqXJ4fexZLLryPfvjqMr JKHk1FgZz6JYd7cGa6GvR2iXstq1+gtmT40dAXdn6ZEgJgYVYbRlRe/sEdLDx0q8KJmV be8A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id y9-v6si13773203pgs.214.2018.10.02.05.11.04; Tue, 02 Oct 2018 05:11:19 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727981AbeJBSxP (ORCPT + 99 others); Tue, 2 Oct 2018 14:53:15 -0400 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:36020 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727799AbeJBSxO (ORCPT ); Tue, 2 Oct 2018 14:53:14 -0400 Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx08-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w92C4Rqd012840; Tue, 2 Oct 2018 14:09:57 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2mu1bjsnur-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Tue, 02 Oct 2018 14:09:57 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 239CE34; Tue, 2 Oct 2018 12:09:57 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas23.st.com [10.75.90.46]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 085532A3B; Tue, 2 Oct 2018 12:09:57 +0000 (GMT) Received: from SAFEX1HUBCAS22.st.com (10.75.90.93) by SAFEX1HUBCAS23.st.com (10.75.90.46) with Microsoft SMTP Server (TLS) id 14.3.361.1; Tue, 2 Oct 2018 14:09:56 +0200 Received: from lmecxl0923.lme.st.com (10.48.0.237) by Webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.361.1; Tue, 2 Oct 2018 14:09:56 +0200 From: Ludovic Barre To: Ulf Hansson , Rob Herring CC: Maxime Coquelin , Alexandre Torgue , , Gerald Baeza , Loic Pallardy , , , , , , Ludovic Barre Subject: [PATCH V4 14/25] mmc: mmci: expand startbiterr to irqmask and error check Date: Tue, 2 Oct 2018 14:09:16 +0200 Message-ID: <1538482167-13819-15-git-send-email-ludovic.Barre@st.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1538482167-13819-1-git-send-email-ludovic.Barre@st.com> References: <1538482167-13819-1-git-send-email-ludovic.Barre@st.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.48.0.237] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2018-10-02_03:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ludovic Barre All variants don't pretend to have a startbiterr. -While data error check, if status register return an error (like MCI_DATACRCFAIL) we must avoid to check MCI_STARTBITERR (if not desired). -expand start_err to MCI_IRQENABLE to avoid to set this bit by default. Signed-off-by: Ludovic Barre --- drivers/mmc/host/mmci.c | 27 ++++++++++++++++----------- drivers/mmc/host/mmci.h | 6 +++--- 2 files changed, 19 insertions(+), 14 deletions(-) diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index 59a2188..168bb6d 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -1037,14 +1037,18 @@ static void mmci_data_irq(struct mmci_host *host, struct mmc_data *data, unsigned int status) { + unsigned int status_err; + /* Make sure we have data to handle */ if (!data) return; /* First check for errors */ - if (status & (MCI_DATACRCFAIL | MCI_DATATIMEOUT | - host->variant->start_err | - MCI_TXUNDERRUN | MCI_RXOVERRUN)) { + status_err = status & (host->variant->start_err | + MCI_DATACRCFAIL | MCI_DATATIMEOUT | + MCI_TXUNDERRUN | MCI_RXOVERRUN); + + if (status_err) { u32 remain, success; /* Terminate the DMA transfer */ @@ -1061,18 +1065,18 @@ mmci_data_irq(struct mmci_host *host, struct mmc_data *data, success = data->blksz * data->blocks - remain; dev_dbg(mmc_dev(host->mmc), "MCI ERROR IRQ, status 0x%08x at 0x%08x\n", - status, success); - if (status & MCI_DATACRCFAIL) { + status_err, success); + if (status_err & MCI_DATACRCFAIL) { /* Last block was not successful */ success -= 1; data->error = -EILSEQ; - } else if (status & MCI_DATATIMEOUT) { + } else if (status_err & MCI_DATATIMEOUT) { data->error = -ETIMEDOUT; - } else if (status & MCI_STARTBITERR) { + } else if (status_err & MCI_STARTBITERR) { data->error = -ECOMM; - } else if (status & MCI_TXUNDERRUN) { + } else if (status_err & MCI_TXUNDERRUN) { data->error = -EIO; - } else if (status & MCI_RXOVERRUN) { + } else if (status_err & MCI_RXOVERRUN) { if (success > host->variant->fifosize) success -= host->variant->fifosize; else @@ -1913,7 +1917,7 @@ static int mmci_probe(struct amba_device *dev, goto clk_disable; } - writel(MCI_IRQENABLE, host->base + MMCIMASK0); + writel(MCI_IRQENABLE | variant->start_err, host->base + MMCIMASK0); amba_set_drvdata(dev, mmc); @@ -2000,7 +2004,8 @@ static void mmci_restore(struct mmci_host *host) writel(host->datactrl_reg, host->base + MMCIDATACTRL); writel(host->pwr_reg, host->base + MMCIPOWER); } - writel(MCI_IRQENABLE, host->base + MMCIMASK0); + writel(MCI_IRQENABLE | host->variant->start_err, + host->base + MMCIMASK0); mmci_reg_delay(host); spin_unlock_irqrestore(&host->lock, flags); diff --git a/drivers/mmc/host/mmci.h b/drivers/mmc/host/mmci.h index 042cbef..8aafafd 100644 --- a/drivers/mmc/host/mmci.h +++ b/drivers/mmc/host/mmci.h @@ -181,9 +181,9 @@ #define MMCIFIFO 0x080 /* to 0x0bc */ #define MCI_IRQENABLE \ - (MCI_CMDCRCFAILMASK|MCI_DATACRCFAILMASK|MCI_CMDTIMEOUTMASK| \ - MCI_DATATIMEOUTMASK|MCI_TXUNDERRUNMASK|MCI_RXOVERRUNMASK| \ - MCI_CMDRESPENDMASK|MCI_CMDSENTMASK|MCI_STARTBITERRMASK) + (MCI_CMDCRCFAILMASK | MCI_DATACRCFAILMASK | MCI_CMDTIMEOUTMASK | \ + MCI_DATATIMEOUTMASK | MCI_TXUNDERRUNMASK | MCI_RXOVERRUNMASK | \ + MCI_CMDRESPENDMASK | MCI_CMDSENTMASK) /* These interrupts are directed to IRQ1 when two IRQ lines are available */ #define MCI_IRQ1MASK \ -- 2.7.4