Received: by 2002:ac0:a582:0:0:0:0:0 with SMTP id m2-v6csp2350583imm; Wed, 3 Oct 2018 02:26:40 -0700 (PDT) X-Google-Smtp-Source: ACcGV604ZiuLqOLYpbaCsIi4yaVx1OeXEoA0g4vbEVF/HyJ3mmRjqzl5FATNlwqDEE8zcquhLHPw X-Received: by 2002:a63:d84a:: with SMTP id k10-v6mr575458pgj.314.1538558800567; Wed, 03 Oct 2018 02:26:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1538558800; cv=none; d=google.com; s=arc-20160816; b=bn5Y1+yYF/+NyEORnw5Hvg9Lc01eLLUXr1cM98Duay8AK3vzRw/CI0CpDq7Mzx0iUq UITC2cokkf/J9cUNzg7WkGTEz4vuYHGB8L4GGwPBU6Tc9Uceo+dm8rF3XuVuuE62hJ5S KHA5p86D+OulAgGE+A7BUW0G7zw7bZS+xZYMIEG+6J7h2HMkHPtEaPsEbMom5PEjWAC1 oa+RbtXNcLsvdofxOYKSq8ZiltMGTo8MuR/YjjXdpTAtEAc7aQSxVdHuZZP7bqyFcNAC 2lbPxf2rM9lJ5BAte/BXVEO7n247TYMnhL3RC41r1G2uUuK4FIlKBa52NZm5DzWvkq+D 5jMA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding :content-language:in-reply-to:mime-version:user-agent:date :message-id:organization:from:references:cc:to:subject; bh=9ACnZcLaCn59Jc3cDDGU37eiOkxvcnIR+mleWstc81Q=; b=H919wZmG2GVyxdruWWIIvv1Ms1TdLWLZmbEyj+UzM4ibGrKOVehNh/aSsIK+e9xqX0 pw/1B3eIJth1pEFW/U9yqjSSSU2aYCCijhVGaQVitmLRFIyuhziNAo/ZKipuegvWN5GC jXtUTh77YQ5CJEDEYOxWN/O2ZsMnCg0bmw3ZomEvxCxxReiWFiJ97tpIIDHzvBfX52zP 4vXpVFLrMPc+a4hZsVrdMYYwAK9AallqRmKXhDVZaq1htjlAYUC5hs4sXL/7s1vls3H/ /aS29Pl6SDh6/O5pzezZC0jGdHUzMTQxJOZzXN23tJbRO1srBMwMjlBakOUutUr1sRVn JH8g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id p9-v6si1141275pll.298.2018.10.03.02.26.25; Wed, 03 Oct 2018 02:26:40 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726970AbeJCQNh (ORCPT + 99 others); Wed, 3 Oct 2018 12:13:37 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:48324 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726216AbeJCQNh (ORCPT ); Wed, 3 Oct 2018 12:13:37 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C31DE7A9; Wed, 3 Oct 2018 02:26:03 -0700 (PDT) Received: from [10.4.13.99] (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id AC3443F5B7; Wed, 3 Oct 2018 02:26:01 -0700 (PDT) Subject: Re: [PATCH v5 19/27] irqchip/gic-v3: Remove acknowledge loop To: Julien Thierry , linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, daniel.thompson@linaro.org, joel@joelfernandes.org, mark.rutland@arm.com, christoffer.dall@arm.com, james.morse@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, Thomas Gleixner , Jason Cooper References: <1535471497-38854-1-git-send-email-julien.thierry@arm.com> <1535471497-38854-20-git-send-email-julien.thierry@arm.com> From: Marc Zyngier Organization: ARM Ltd Message-ID: Date: Wed, 3 Oct 2018 10:26:00 +0100 User-Agent: Mozilla/5.0 (X11; Linux aarch64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 MIME-Version: 1.0 In-Reply-To: <1535471497-38854-20-git-send-email-julien.thierry@arm.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-GB Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 28/08/18 16:51, Julien Thierry wrote: > Multiple interrupts pending for a CPU is actually rare. Doing an > acknowledge loop does not give much better performance or even can > deteriorate them. > > Do not loop when an interrupt has been acknowledged, just return > from interrupt and wait for another one to be raised. > > Tested-by: Daniel Thompson > Signed-off-by: Julien Thierry > Cc: Thomas Gleixner > Cc: Jason Cooper > Cc: Marc Zyngier > --- > drivers/irqchip/irq-gic-v3.c | 65 +++++++++++++++++++++----------------------- > 1 file changed, 31 insertions(+), 34 deletions(-) It would probably be valuable to do the same thing for GICv1/v2, where the MMIO access can be even more costly. In the meantime, I've queued this for 4.20. Thanks, M. -- Jazz is not dead. It just smells funny...