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[209.132.180.67]) by mx.google.com with ESMTP id v20-v6si1622139plo.147.2018.10.03.06.23.15; Wed, 03 Oct 2018 06:23:29 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727529AbeJCULH (ORCPT + 99 others); Wed, 3 Oct 2018 16:11:07 -0400 Received: from mail.bootlin.com ([62.4.15.54]:37554 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726793AbeJCULF (ORCPT ); Wed, 3 Oct 2018 16:11:05 -0400 Received: by mail.bootlin.com (Postfix, from userid 110) id 1F25A208B7; Wed, 3 Oct 2018 15:22:36 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.bootlin.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from bbrezillon.fritz.box (AAubervilliers-681-1-24-95.w90-88.abo.wanadoo.fr [90.88.144.95]) by mail.bootlin.com (Postfix) with ESMTPSA id 07455208C2; Wed, 3 Oct 2018 15:22:20 +0200 (CEST) From: Boris Brezillon To: Wolfram Sang , linux-i2c@vger.kernel.org, Jonathan Corbet , linux-doc@vger.kernel.org, Greg Kroah-Hartman , Arnd Bergmann Cc: Przemyslaw Sroka , Arkadiusz Golec , Alan Douglas , Bartosz Folta , Damian Kos , Alicja Jurasik-Urbaniak , Cyprian Wronka , Suresh Punnoose , Rafal Ciepiela , Thomas Petazzoni , Nishanth Menon , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Vitor Soares , Geert Uytterhoeven , Linus Walleij , Xiang Lin , linux-gpio@vger.kernel.org, Sekhar Nori , Przemyslaw Gaj , Peter Rosin , Mike Shettel , Stephen Boyd , Boris Brezillon Subject: [PATCH v8 10/10] dt-bindings: gpio: Add bindings for Cadence I3C gpio expander Date: Wed, 3 Oct 2018 15:22:12 +0200 Message-Id: <20181003132212.12619-11-boris.brezillon@bootlin.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20181003132212.12619-1-boris.brezillon@bootlin.com> References: <20181003132212.12619-1-boris.brezillon@bootlin.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Document the Cadence I3C gpio expander bindings. Signed-off-by: Boris Brezillon Reviewed-by: Rob Herring --- Changes in v8: - None Changes in v7: - None Changes in v6: - None Changes in v5: - Add Rob's R-b Changes in v4: - Use GPIO_ and IRQ_TYPE_ macros instead of raw numbers - Fix the unit-address in the example --- .../devicetree/bindings/gpio/gpio-cdns-i3c.txt | 39 ++++++++++++++++++++++ 1 file changed, 39 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/gpio-cdns-i3c.txt diff --git a/Documentation/devicetree/bindings/gpio/gpio-cdns-i3c.txt b/Documentation/devicetree/bindings/gpio/gpio-cdns-i3c.txt new file mode 100644 index 000000000000..d0155a9cea79 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/gpio-cdns-i3c.txt @@ -0,0 +1,39 @@ +* Cadence I3C GPIO expander + +The Cadence I3C GPIO expander provides 8 GPIOs controllable over I3C. +This GPIOs can be configured in output or input mode and if they are in input +mode they can generate IBIs (In Band Interrupts). + +Required properties for GPIO node: +- reg : 3 cells encoding the I3C static address (none in our case) and the I3C + Provisional ID. See Documentation/devicetree/bindings/i3c/i3c.txt for + more details. + Should be <0x0 0x392 0x0>. +- gpio-controller : Marks the device node as a gpio controller. +- #gpio-cells : Should be two. The first cell is the pin number and + the second cell is used to specify the gpio polarity (GPIO_ACTIVE_HIGH or + GPIO_ACTIVE_LOW) +- interrupt-controller: Marks the device node as an interrupt controller. +- #interrupt-cells : Should be 2. The first cell is the GPIO number. + The second cell is used to specify trigger type and level flags. + The following trigger types are accepted (see + for their definition): + IRQ_TYPE_EDGE_RISING + IRQ_TYPE_EDGE_FALLING + IRQ_TYPE_EDGE_BOTH + IRQ_TYPE_LEVEL_HIGH + IRQ_TYPE_LEVEL_LOW + +Example: + + i3c-master@xxx { + ... + i3c_gpio_expander: gpio@0,39200000000 { + reg = <0 0x392 0x0>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + ... + }; -- 2.14.1