Received: by 2002:ac0:a582:0:0:0:0:0 with SMTP id m2-v6csp2721324imm; Wed, 3 Oct 2018 08:12:26 -0700 (PDT) X-Google-Smtp-Source: ACcGV62xSQR4nxOQcUOxEc20uk0+lNDiipPU7UPzcEe7aau7G5JmQ6XWjORCaH2JCA5ggrQMdxom X-Received: by 2002:a63:c642:: with SMTP id x2-v6mr957098pgg.16.1538579546048; Wed, 03 Oct 2018 08:12:26 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1538579546; cv=none; d=google.com; s=arc-20160816; b=DjhvYATrx5uUMaPXaRwNzAAQ2e9D8N3GpN4HibZ4Ymo++9J280d/rARqjJ/ZLkp7b1 qB4tT2L7fy5l9rd/m8e+lZs59Wf9hj6JDLzI8Zkq1iY69QULCG/RXJlDKxnQjSw7tvqv Ba6ZGFN6yTfJmkCbMH1jNwfJOLRd5vUHiMbXEpEhZ0iKkIZMmUYRxLB6/gOFb8090HKM Ra1HcSi/JuF/R7sIYtyuokVhSPJnk7exBReC0wuwZZH4EgFyTJhdcW7/QJ6CL8+Ao4AM LG2G7RO+TZwobbW5spiJyDL7ebwV3QIbcqYVqNlDRf527qMue4qv/Yy5bNczBvjaBKwd x9ug== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:message-id:date:subject:cc :to:from; bh=4rl2w0Cj4Oo9OeGizynaBN5eF/ab4wYK8lPuQDMvzgo=; b=RW1klMOGEfCpkJ03esUN+lQEUxCg0iyKZHdPpcmQLD7zvInlDrcE40EhNUD7VXwori fKqdmedk1rdz/qE9fHyoVb4Qumh+OrlizVdVKuL12J+kX4x2Mwr1h6FHkZUhG92nU7Mv dnLEMAOpur7mNuBrqhRhHw3cTlOPaXy7pH0+WcaDAkgYQzESzkuS9Emh/PGqXqcnI6F1 NTL/OZVtjVWSUNWua4iOOAi8aQe2BkuI1QLw2KXkPVXJjq+LjYaBBTBzbVd25ChVrXFC 7vrMyhgtX5xJrkl5Sn3O7wlfwwEdlwsitniqcQYbB6OlpVIJIU7c4E5omocNYWSvvA12 HR7A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z11-v6si1708704pgs.323.2018.10.03.08.12.10; Wed, 03 Oct 2018 08:12:26 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727318AbeJCWAh (ORCPT + 99 others); Wed, 3 Oct 2018 18:00:37 -0400 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:4912 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726748AbeJCWAh (ORCPT ); Wed, 3 Oct 2018 18:00:37 -0400 Received: from pps.filterd (m0046037.ppops.net [127.0.0.1]) by mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w93EwpRE010454; Wed, 3 Oct 2018 17:11:23 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2mv4mj7xs4-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Wed, 03 Oct 2018 17:11:23 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 336873A; Wed, 3 Oct 2018 15:11:23 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag5node3.st.com [10.75.127.15]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id EE8F84E65; Wed, 3 Oct 2018 15:11:22 +0000 (GMT) Received: from localhost (10.75.127.45) by SFHDAG5NODE3.st.com (10.75.127.15) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 3 Oct 2018 17:11:21 +0200 From: Fabrice Gasnier To: CC: , , , , , , , Subject: [PATCH 0/3] ARM: dts: stm32: add dmas to stm32mp157c timers Date: Wed, 3 Oct 2018 17:11:02 +0200 Message-ID: <1538579465-7854-1-git-send-email-fabrice.gasnier@st.com> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.75.127.45] X-ClientProxiedBy: SFHDAG5NODE1.st.com (10.75.127.13) To SFHDAG5NODE3.st.com (10.75.127.15) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2018-10-03_07:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This series adds dmas description to stm32mp157c device tree file. But dmas are kept disabled by default on all boards. They are only necessary for PWM capture. So, spare them for other usage by default. Fabrice Gasnier (3): ARM: dts: stm32: Add dmas to timer on stm32mp157c ARM: dts: stm32: don't use timers dmas on stm32mp157c-ed1 ARM: dts: stm32: don't use timers dmas on stm32mp157c-ev1 arch/arm/boot/dts/stm32mp157c-ed1.dts | 3 ++ arch/arm/boot/dts/stm32mp157c-ev1.dts | 7 +++++ arch/arm/boot/dts/stm32mp157c.dtsi | 58 +++++++++++++++++++++++++++++++++++ 3 files changed, 68 insertions(+) -- 1.9.1